| Budget Amount *help |
¥69,030,000 (Direct Cost: ¥53,100,000、Indirect Cost: ¥15,930,000)
Fiscal Year 2013: ¥15,210,000 (Direct Cost: ¥11,700,000、Indirect Cost: ¥3,510,000)
Fiscal Year 2012: ¥15,210,000 (Direct Cost: ¥11,700,000、Indirect Cost: ¥3,510,000)
Fiscal Year 2011: ¥15,210,000 (Direct Cost: ¥11,700,000、Indirect Cost: ¥3,510,000)
Fiscal Year 2010: ¥15,210,000 (Direct Cost: ¥11,700,000、Indirect Cost: ¥3,510,000)
Fiscal Year 2009: ¥8,190,000 (Direct Cost: ¥6,300,000、Indirect Cost: ¥1,890,000)
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| Research Abstract |
Nanometer-scale surface roughness has become an important issue to be resolved in the fabrication of nanoscale devices, because the roughness at the feature bottom and sidewalls affects the variability in transistor performance. We have developed a three-dimensional atomic-scale cellular model (ASCeM-3D) based on the Monte Carlo algorithm, to simulate plasma-surface interactions and the nanoscale feature profile evolution during plasma etching of Si in Cl-based plasmas. Numerical results exhibited nanoscale surface roughening and rippling in response to ion incidence angle onto substrate surfaces. The mechanisms for such surface roughening and rippling of etched surfaces were investigated through a comparison with experiments, with the help of a classical molecular dynamics simulation. Based on these understanding, the pulse-bias etching through a repetitive on/off of the rf bias power was demonstrated to be one promising way of reducing the surface roughness during plasma etching.
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