| Project/Area Number |
01460082
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| Research Category |
Grant-in-Aid for General Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Research Field |
物理計測・光学
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| Research Institution | Toyohashi Institute of Technology |
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Principal Investigator |
YONEZU Hiroo Toyohashi University of Technology Engineering Department, Professor, 工学部, 教授 (90191668)
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| Co-Investigator(Kenkyū-buntansha) |
TAKANO Yasushi Toyohasi University of Technology Engineering Department, Research Assistant, 工学部, 助手 (00197120)
PAK Kangsa Toyohashi University of Technology Engineering Department, Associate Professor, 工学部, 助教授 (10124736)
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| Project Period (FY) |
1989 – 1990
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| Project Status |
Completed (Fiscal Year 1990)
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| Budget Amount *help |
¥5,700,000 (Direct Cost: ¥5,700,000)
Fiscal Year 1990: ¥1,300,000 (Direct Cost: ¥1,300,000)
Fiscal Year 1989: ¥4,400,000 (Direct Cost: ¥4,400,000)
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| Keywords | Neuro-device / Neural Network / Variable Synaptic Weight / Synaptic Connection / Self-Organization / Optoelectronic Integrated Circuit / Hetero-epitaxy / GaAs on Si / 神経回路網 / ニュ-ロン / 結合重み / アナログ重み / 光配線 |
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| Research Abstract |
A basic study on neuro-devices and optical interconnection has been conducted for large-scale neural networks in the viewpoint of an optoelectronic integrated circuit (OEIC). The fundamental feasibiity and technological barriers were investigated.
Optical outputs from other neurons were multiplied by synaptic weights and summed in the artificial neuron. Then the optical output was emitted with the sigmoid function, which is easily generated by an LED connected to a differential amplifier. The function of synaptic connection is most important in the neuron. Firstly, an optoelectronic circuit was developed, which acted as a synaptic connection with variable synaptic weights. As a result, the basic function as well as the preferable performances of the optical interconnection were clarified. Then a new device with a self-organizing function was developed, whose synaptic weight is adapted to a teacher's signal. These optoelectronic fundamental device and circuits were fabricated using Si IC technology. Preferable characteristics for large-scale integration were clarified such as a very low current operation of the order of nA and a simple structure.
Initial growth mechanisms were also studied in epitaxial growth of GaAs on Si, which could be needed for one-chip OEIC. The initial three dimensional growth must be avoided essentially for a growth of high quality GaAs on Si. A quasi-two dimensional growth was realized by introducing an AlAs initial layer having a stronger chemical bond or a thin GaAs layer grown by solid phase epitaxy. In addition, a mirror surface was obtained in homoepitaxy of GaAs(111)B and (110) by enhancing a Ga-migration.
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