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BASIC STUDY ON HIGH-PERFORMANCE MULTIPLE-VALUED SUPER CHIP FOR INTELLIGENT ROBOTS

Research Project

Project/Area Number 01460157
Research Category

Grant-in-Aid for General Scientific Research (B)

Allocation TypeSingle-year Grants
Research Field 計測・制御工学
Research InstitutionTOHOKU UNIVERSITY

Principal Investigator

HIGUCHI Tatsuo  TOHOKU UNIVERSITY FACULTY OF ENGINEERING, 工学部, 教授 (20005317)

Co-Investigator(Kenkyū-buntansha) HANYU Takahiro  TOHOKU UNIVERSITY FACULTY OF ENGINEERING PROFESSOR, 工学部, 助手 (40192702)
KAMEYAMA Michitaka  PROFESSOR TOHOKU UNIVERSITY FACULTY OF ENGINEERING PROFESSOR, 工学部, 教授 (70124568)
Project Period (FY) 1989 – 1991
Project Status Completed (Fiscal Year 1991)
Budget Amount *help
¥4,500,000 (Direct Cost: ¥4,500,000)
Fiscal Year 1991: ¥500,000 (Direct Cost: ¥500,000)
Fiscal Year 1990: ¥1,200,000 (Direct Cost: ¥1,200,000)
Fiscal Year 1989: ¥2,800,000 (Direct Cost: ¥2,800,000)
KeywordsSD Number System / Multiple-Valued Bidirectional Current-Mode / SD Full-Adder / Modular Realization / SD Multiplier / Multiple-Valued Super Chip / ロボットビジョン用VLSI / 演算遅れ時間最小 / ス-パ-チップ / 知能ロボット用プロセッサ / 多値SD数演算回路 / 多値双方向電流モ-ド回路 / 多値モジュ-ルアレ- / 指定配線数 / 設計容易性 / セミカスタムVLSI / 知能ロボット / 高速算術演算用アレ- / 4進SD数加算器
Research Abstract

In the conventional binary arithmetic circuits based on array structures, the operating speed is restricted by carry propagation. The carry propagation in the signed-digit (SD) number systems is always limited to one position to the left. However, the SD number systems have not been studied from the point of view of integrated circuit implementation.
This project begins with implementation of the multiple-valued bidirectional current-mode circuits composed of current source, current mirrors, threshold detector, and bidirectional current input. Using the bidirectional currentmode circuits, the SD full adder is realized. The layout of the SD full adder is given with 2-mum CMOS technology. The module is constructed by an adder, a partial-product generator, a quotient digit generator, a sign invertor, two encoders and four wiring blocks.
Using the modules thus obtained, any arithmetic operations based on addition, subtraction, multiplication and division can be realized by appropriately specifying the interconnection among the modules. This modular realization is very useful for semicustom VLSI as gate array. The comparison between the proposed SD multiplier and the fastest binary multiplier is carried out.
The SD multiply time is comparable to that of the fastest binary multiplier. From the point of view of reduction in design complexity, however, the SD multiplier is much more superior to the binary multiplier.
Lastly, it is demonstrated that these advantages of the multiple-valued technology are useful for implementation of the multiple-valued super chip for intelligent robots. The high-performance of the chip is also evaluated in detail.

Report

(4 results)
  • 1991 Annual Research Report   Final Research Report Summary
  • 1990 Annual Research Report
  • 1989 Annual Research Report
  • Research Products

    (26 results)

All Other

All Publications (26 results)

  • [Publications] 川人 祥二: "双方向電流モ-ド多値並列乗算器の高性能化" 電子情報通信学会論文誌. J72ーCーII. 434-441 (1989)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1991 Final Research Report Summary
  • [Publications] 亀山 充隆: "多値情報処理システムとVLSI化" 電子情報通信学会論文誌. J72ーA. 198-207 (1989)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1991 Final Research Report Summary
  • [Publications] S.Kawahito: "Multiple-Valued Radix-2 Signed-Digit Arithmetic Circuits for High-Performance VLSI Systems" IEEE Journal of Solid-State Circuits. 25. 125-131 (1990)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1991 Final Research Report Summary
  • [Publications] 亀山 充隆: "Signed.Digit数演算多値モジュ-ルアレ-の構成" 電子情報通信学会論文誌. J74ーA. 296-303 (1991)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1991 Final Research Report Summary
  • [Publications] K.Shimabukuro: "Design of a Multiple-Va ued VLSI Processor for Digital Control" Proc.22nd IEEE Int.Symp.on Multiple-Valued Logic. (1992)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1991 Final Research Report Summary
  • [Publications] 樋口 龍雄: "多値情報処理ーポストバイナリエレクトロニクスー" 昭晃堂, 195 (1989)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1991 Final Research Report Summary
  • [Publications] SHOJI KAWAHITO: "A HIGH-PERFORMANCE MULTIPLE-VALUED MULTIPLIER USING BIDIRECTIONAL CURRENTMODE MOS TECHNOLOGY" THE TRANS. OF IEICE. J72-C-II. 434-441 (1989)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1991 Final Research Report Summary
  • [Publications] MICHITAKA KAMEYAMA: "MULTIPLE-VALUED INFORMATION PROCESSING SYSTEMS AND ITS VLSI REALIZATION" THE TRANS. OF IEICE. J72-A. 198-207

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1991 Final Research Report Summary
  • [Publications] SHOJI KAWAHITO: "MULTIPLE-VALUED RADIX-2 SIGNEDDIGIT ARITHMETIC CIRCUITS FOR HIGH-PERFORMANCE VLSI SYSTEMS" IEEE JOURNAL OF SOLID-STATE CIRCUITS. 25. 125-131 (1990)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1991 Final Research Report Summary
  • [Publications] MICHITAKA KAMEYAMA: "DESIGN OF MULTIPLE-VALUED MODULAR ARRAY USING SIGNED-DIGIT ARITHMETIC" THE TRANS. OF IEICE. J-74-A. 296-303 (1991)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1991 Final Research Report Summary
  • [Publications] KATSUHIKO SHIMABUKURO: "DESIGN OF A MULTIPLEVALUED VLSI PROCESSOR FOR DIGITAL CONTROL" PROC. 22nd IEEE INT. SYMP. ON MULTIPLE-VALUED LOGIC. (1992)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1991 Final Research Report Summary
  • [Publications] TATSUO HIGUCHI: SHOKODO. MULTIPLE-VALUED DIGITAL PROCESSING SYSTEMS, 195 (1989)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1991 Final Research Report Summary
  • [Publications] 亀山: "SignedーDigit数演算多値モジュ-ルアレ-の構成" 電子情報通信学会論文誌A. J74ーA. 296-303 (1991)

    • Related Report
      1991 Annual Research Report
  • [Publications] M.Kameyama: "Highly Parallel Collision Detection VLSI Processor for Intelligent Robots" 1991 Symposium on VLSI Circuits. 29-30 (1991)

    • Related Report
      1991 Annual Research Report
  • [Publications] M.Kameyama: "Arithemetic Semicustom VLSI Based on Module Array Structure" 1991 Symposium on VLSI Circuits. 101-102 (1991)

    • Related Report
      1991 Annual Research Report
  • [Publications] K.Somchai: "Design of a Matrix MultiplyーAddition VLSI Processor for Robot Inverse Dynamics Computation" IEICE Transactions. E74. 3819-3823 (1991)

    • Related Report
      1991 Annual Research Report
  • [Publications] M.Kameyama: "A SpecialーPurpose LSI for Inverse Kinematics Computation" IEICE Transactions. E74. 3829-3837 (1991)

    • Related Report
      1991 Annual Research Report
  • [Publications] K.Shimabukuro: "Design of a MultipleーValued VLSI Processor for Digital Control" Proc.22nd IEEE Int.Symp.on MultipleーValued Logic. (1992)

    • Related Report
      1991 Annual Research Report
  • [Publications] 亀山 充隆: "Signed・Digit数演算多値モジュ-ルアレ-の構成" 電子情報通信学会論文誌. J74ーA. 296-303 (1991)

    • Related Report
      1990 Annual Research Report
  • [Publications] S.Kawahito: "MultipleーValued Radixー2 SignedーDigit Arithmetic Circuits for HighーPerformance VLSI Systems" IEEE Journal of SolidーState Circuits. 25. 125-131 (1900)

    • Related Report
      1990 Annual Research Report
  • [Publications] 川人 祥二: "双方向電流モ-ド多値並列乗算器の高性能化" 電子情報通信学会論文誌. J72ーCーII. 434-441 (1989)

    • Related Report
      1990 Annual Research Report
  • [Publications] 亀山 充隆: "多値情報処理システムとVLSI化" 電子情報通信学会論文誌. J72ーA. 198-207 (1989)

    • Related Report
      1990 Annual Research Report
  • [Publications] 樋口 龍雄: "多値情報処理ーポストバイナリエレクトロニクスー" 昭晃堂, 195 (1989)

    • Related Report
      1990 Annual Research Report
  • [Publications] 川人祥二: "双方向電流モ-ド多値並列乗算器の高性能化" 電子情報通信学会論文誌. J72-C-II. 434-441 (1989)

    • Related Report
      1989 Annual Research Report
  • [Publications] 亀山充隆: "多値情報処理システムとVLSI化" 電子情報通信学会論文誌. J72-A. 198-207 (1989)

    • Related Report
      1989 Annual Research Report
  • [Publications] 樋口龍雄: "多値情報処理-ポストバイナリエレクトロニクスー" 昭晃堂, 195 (1989)

    • Related Report
      1989 Annual Research Report

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Published: 1989-04-01   Modified: 2016-04-21  

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