| Project/Area Number |
01550295
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| Research Category |
Grant-in-Aid for General Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Research Field |
計算機工学
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| Research Institution | Osaka Electro-Communication University |
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Principal Investigator |
ASANO Tetsuo Faculty of Engineering, Osaka Electro-Communication University, Professor., 工学部, 教授 (90113133)
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| Project Period (FY) |
1989 – 1990
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| Project Status |
Completed (Fiscal Year 1990)
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| Budget Amount *help |
¥2,400,000 (Direct Cost: ¥2,400,000)
Fiscal Year 1990: ¥700,000 (Direct Cost: ¥700,000)
Fiscal Year 1989: ¥1,700,000 (Direct Cost: ¥1,700,000)
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| Keywords | クラスタリング / 類似度行列 / 計増幾何学 / アルゴリズム / 幾何学的変換法 / 回路分割問題 / 計算幾何学 / レイアウト設計 / VLSI / 固有値 / 素子配置 |
|---|
| Research Abstract |
Grouping similar objects is called cluster analysis. There have been considered a lot of algorithms. When we formulate this problem as a problem in Graph Theory, it may often become NP-complete. Therefore, we rely on heuristic algorithms. In this research we first presented an algorithm for mapping objects into points in the plane so that similar objects are placed closely, based on Principal Coordinate Analysis. Then, applying Geometric Transform, points are mapped into lines. Using Topological Walk Algorithm developed in the research, we can examine all possible regions defined by those lines. This corresponds to examination of all possible partitions of those points in the dual plane. The idea was applied to Circuit Partitioning in VLSI design.
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