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Research on Distributed Stochastic Large-Scale Optimization Method with Learning

Research Project

Project/Area Number 01550324
Research Category

Grant-in-Aid for General Scientific Research (C)

Allocation TypeSingle-year Grants
Research Field 計測・制御工学
Research InstitutionChiba University

Principal Investigator

HIRATA Hironori  Chiba University, Dept. of Electrical and Electronics Engineering, Associate Professor, 工学部, 助教授 (60111415)

Co-Investigator(Kenkyū-buntansha) SUGAI Yasuo  Chiba University, Graduate School of Science and Technology, Research Associate, 大学院自然科学研究科, 助手 (30187629)
Project Period (FY) 1989 – 1990
Project Status Completed (Fiscal Year 1990)
Budget Amount *help
¥1,800,000 (Direct Cost: ¥1,800,000)
Fiscal Year 1990: ¥300,000 (Direct Cost: ¥300,000)
Fiscal Year 1989: ¥1,500,000 (Direct Cost: ¥1,500,000)
Keywordsdistributed type / layout of VLSI / placement / routing / large-scale / learning / neural networks / ニュ-ラルネット / 確率的最適化
Research Abstract

We studied distributed methods for large-scale combinatorial optimization problems.
(1) Based on biological evolution which means the adaptation (learning) to the enviromment, we modified simulated annealing and developed a new stochastic optimization method.
(2) We studied optimization without cost function using learning of neural networks.
The application of the developed methods to layout design of VLSI, i. e., placement and routing problems, showed the effectiveness.

Report

(3 results)
  • 1990 Annual Research Report   Final Research Report Summary
  • 1989 Annual Research Report
  • Research Products

    (22 results)

All Other

All Publications (22 results)

  • [Publications] 小圷 成一: "遺伝的要素を取り入れた改良型アニ-リング法によるブロック配置手法" 電子情報通信学会論文誌 A分冊. J73ーA. 87-94 (1990)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1990 Final Research Report Summary
  • [Publications] 須貝 康雄: "フィ-ドスル-位置最適化に着目したスタンダ-ドセル方式 VLSIの概略配線手法" 電子情報通信学会論文誌 A分冊. J73ーA. 77-86 (1990)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1990 Final Research Report Summary
  • [Publications] 須貝 康雄: "競合学習を用いたVLSIの配置手法" 電気学会論文誌 C分冊. 110ーC. 182-190 (1990)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1990 Final Research Report Summary
  • [Publications] 大池 浩一: "ニュ-ラルネットワ-ク型学習を用いたVLSIのチャネル配線手法" 電子情報通信学会論文誌 A分冊. J73ーA. 809-817 (1990)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1990 Final Research Report Summary
  • [Publications] 須貝 康雄: "組合せ最適化アルゴリズムとその応用" 計測自動制御学会誌「計測と制御」. 29. 18-25 (1990)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1990 Final Research Report Summary
  • [Publications] Seiichi Koakutsu: "VLSI Block Placement using Improved Simulated Annealing Based on Genetic Algorithm" IEEE Trans.on CAD.

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1990 Final Research Report Summary
  • [Publications] S. Koakutsu, Y. Sugai and H. Hirata: "Block Placement by Improved Simulated Annealing Based on Genetic Algorithm" IEICE Trans. Vol. J73-A. 87-94 (1990)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1990 Final Research Report Summary
  • [Publications] Y. Sugai and H. Hirata: "A Global Router for Standard Cell VLSI with Feed-Through Assignment Optimization" IEICE Trans. Vol. 73-A. 77-86 (1990)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1990 Final Research Report Summary
  • [Publications] Y. Sugai, S. Koakutsu and H. Hirata: "A Method of VLSI Placement to Competitive Learning" Trans. IEE of Japan. Vol. 100-C. 182-190 (1990)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1990 Final Research Report Summary
  • [Publications] K. Ohike, Y. Sugai and H. Hirata: "A Channel Router for VLSI Using a Neural Network" IEICE Trans. Vol. J73-A. 809-817 (1990)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1990 Final Research Report Summary
  • [Publications] Y. Sugai and H. Hirata: "Algorithms for Combinatorial Optimization and its Applications" J. of SICE. VOL. 29. 18-25 (1990)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1990 Final Research Report Summary
  • [Publications] S. Koakutsu, Y. Sugai and H. Hirata: "Improved Simulated Annealing based on Genetic Algorithm" Proc. MICHT'91. 139-142 (1991)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1990 Final Research Report Summary
  • [Publications] 大池 浩一: "ニュ-ラルネットワ-ク型学習を用いたVLSIのチャネル配線手法" 電子情報通信学会論文誌A分冊. J73ーA. 809-817 (1990)

    • Related Report
      1990 Annual Research Report
  • [Publications] 須貝 康雄: "競合学習を用いたVLSIの配置手法" 電気学会論文誌C分冊. 110ーC. 182-190 (1990)

    • Related Report
      1990 Annual Research Report
  • [Publications] 須貝 康雄: "組合せ最適化アルゴリズムとその応用" 計測と制御. 29. 18-25 (1990)

    • Related Report
      1990 Annual Research Report
  • [Publications] Seiichi Koakutsu: "Improved Simulated Annealing based on Genetic Algorithm" Proc.MICHT'91. 139-142 (1991)

    • Related Report
      1990 Annual Research Report
  • [Publications] Seiichi Koakutsu: "VLSI Block Placement using Improved Simulated Annealing based on Genetic Algorithm" IEEE Trans.on CAD.

    • Related Report
      1990 Annual Research Report
  • [Publications] 須貝康雄: "フィ-ドスル-位置最適化に着目したスタンダ-ドセル方式VLSIの概略配線手法" 電子情報通信学会論文誌A分冊. J73-A. 7 (1990)

    • Related Report
      1989 Annual Research Report
  • [Publications] 小圷成一: "遺伝的要素を取り入れた改良型アニ-リング法によるブロック配置手法" 電子情報通信学会論文誌A分冊. J73-A. 87-94 (1990)

    • Related Report
      1989 Annual Research Report
  • [Publications] 大池浩一: "ニュ-ラルネット型学習を用いたVLSIのチャネル配線手法" 電子情報通信学会論文誌A分冊.

    • Related Report
      1989 Annual Research Report
  • [Publications] 須貝康雄: "競合学習を用いたVLSIの配置手法" 電気学会論文誌C分冊.

    • Related Report
      1989 Annual Research Report
  • [Publications] 小圷成一: "遺伝的要素を取り入れた改良型アニ-リング法のフロアプランへの適用" 電子情報通信学会論文誌.

    • Related Report
      1989 Annual Research Report

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Published: 1989-04-01   Modified: 2016-04-21  

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