| Project/Area Number |
02402032
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| Research Category |
Grant-in-Aid for General Scientific Research (A)
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| Allocation Type | Single-year Grants |
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| Research Field |
電子材料工学
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| Research Institution | Tohoku University Grant-in-Aid for Scientic Research |
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Principal Investigator |
SHIBATA Tadashi Associate Professor, Dept. Electronic Engineering Tohoku University, 工学部, 助教授 (00187402)
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| Co-Investigator(Kenkyū-buntansha) |
MORITA Mizuho Associate Professor, Dept. Electronic Engineering Tohoku University, 工学部, 助教授 (50157905)
OHMI Tadahiro Professor, Dept. Electronic Engineering Tohoku University, 工学部, 教授 (20016463)
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| Project Period (FY) |
1990 – 1991
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| Project Status |
Completed (Fiscal Year 1991)
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| Budget Amount *help |
¥13,500,000 (Direct Cost: ¥13,500,000)
Fiscal Year 1991: ¥5,000,000 (Direct Cost: ¥5,000,000)
Fiscal Year 1990: ¥8,500,000 (Direct Cost: ¥8,500,000)
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| Keywords | Neural Network / Neuron / Neuron MOS Transistor / Binary Logic Circuits / Soft Hard ware Logic / A / D converter / Floating gate / Full adder / 可変閾値トランジスタ / MOSFET / 可変閾値素子 / D / Aコンバ-タ / ニュ-ラルネットワ-ク |
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| Research Abstract |
A new functional MOS transistor has been developed which works more intelligently than a mere switching device. The functional transistor calculates weighted sum of all input signals at the gate level, and controls the "on" and "off" of the transistor based on the result of such a weighted sum operation. Since the function is quite analogous to that of biological neurons, the device is named a neuron MOSFET or neuMOS (nuMOS) in short. The device is composed of a floating gate and plural of input gates that are capacitively interacting with the floating gate. As the gate-level sum operation is perfomied in a voltage mode utilizing the capacitive coupling effect, essentially no power dissipation occurs in the calculation, making the device ideal for ULSI implementation. The basic characteristics of neuron MOSFET's as well as of simple circuit blocks are analyzed based on a simple transistor model and experiments. Making use of its very powerful function, a number of interesting circuit a
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pplications have been explored. neuMOS inverters and neuron circuits, variable threshold transistors and inverters, linear resistors, and neuMOS source follower circuits and single gate D/A converters are described. The concept of a Soft Hardware Logic Circuit implemented by neuMOS transistors has been also developed. The circuit exhibits a very interesting feature that the logical function of the circuit is arbitrarily altered by external signals without any changes in the hardware configuration. When fixed function logic circuits are implemented by nuMOS transistors, the number of transistors as well as of interconnections can be dramatically reduced as compared to their conventional CMOS-design counterparts. 4-bit flash A/D converter, for instance, can be constructed by only 28 transistors although 398 transistors are required in conventional design. Basic operations of these circuits have been experinientally verified by fabricating test circuits using double polysilicon CMOS process. Less
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