| Project/Area Number |
02555071
|
|---|
| Research Category |
Grant-in-Aid for Developmental Scientific Research (B)
|
| Allocation Type | Single-year Grants |
|---|
| Research Field |
情報工学
|
|---|
| Research Institution | Kyoto University (1991)
Kyushu University (1990) |
|---|
Principal Investigator |
TOMITA Shinji Kyoto Univ., Dept. of Computer Science, Professor, 工学部, 教授 (40026323)
|
|---|
| Co-Investigator(Kenkyū-buntansha) |
OYANAGI Shigeru Toshiba Co. LtD, Information Systems Lab., Principal Researcher, 総合研究所・情報システム研究所, 主任研究員
ISHII Mitsuo Fujitsu Laboratory, Information Processing Div., Director, 情報処理研究部門, 部長
YOSHIDA Norihiko Kyushu Univ., Dept. of Information Science, Associate Professor, 工学部, 助教授 (00182775)
MURAKAMI Kazuaki Kyushu Univ., Dept. of Information Systems, Assistant Professor, 大学院総合理工学研究科, 助手 (10200263)
FUKUDA Akira Kyushu Univ., Dept. of Information Systems, Associate Professor, 大学院総合理工学研究科, 助教授 (80165282)
|
|---|
| Project Period (FY) |
1990 – 1991
|
| Project Status |
Completed (Fiscal Year 1991)
|
| Budget Amount *help |
¥17,600,000 (Direct Cost: ¥17,600,000)
Fiscal Year 1991: ¥8,200,000 (Direct Cost: ¥8,200,000)
Fiscal Year 1990: ¥9,400,000 (Direct Cost: ¥9,400,000)
|
|---|
| Keywords | Reconfigurable Architecture / Parallel Computer / Synchronization / Cache Coherence / Parallel Language / Load Balance / Parallel Operating System / Message Driven |
|---|
| Research Abstract |
The purpose of this research is to improve the performance of a parallel computer by narrowing the gap between the logical structure of problems and the physical hardware structure. The prototype computer called KRPP, has been built. The main results of the research are the following :
1. Reconfigurable interconnection network
KRPP consists of 128 SPARC microprocessors (PEs) which are connected by a crossbar network. In order to control the network, two basic modes demand and preset modes, . are prepared. These wde provide reconfigurability by which the network structure can be tailored to a wide range of applications. A network synthesis compiler is also developed.
2. Element processor
KRPP employs a NUMA memory architecture. In order to assure cache coherence for inter PEs and intra PE, a directory based cache coherence protocol and a scheme based on the reverse translation buffer method are implemented.
3. Basic software
A parallel programming language which is an extension of C language and a parallel operating system are also developed. The OS is particularly suited to a tightly coupled multiprocessor and has many features : The OS kernel function itself can be performed in parallel and a high-speed processor allocation mechanism for multiple threads is provided.
|
