| Project/Area Number |
02650239
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| Research Category |
Grant-in-Aid for General Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Research Field |
電子通信系統工学
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| Research Institution | Kanazawa University |
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Principal Investigator |
TAKEBE Tsuyoshi Kanazawwa University, Faculty of Technology, Department of Electrical and Computer Engineering, Professor, 工学部, 教授 (20019699)
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| Co-Investigator(Kenkyū-buntansha) |
MATSUMOTO Toyoji Kanazawa University, Information Processing Center, Lecturer, 総合情報処理センター, 講師 (20173908)
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| Project Period (FY) |
1990 – 1991
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| Project Status |
Completed (Fiscal Year 1991)
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| Budget Amount *help |
¥1,300,000 (Direct Cost: ¥1,300,000)
Fiscal Year 1991: ¥400,000 (Direct Cost: ¥400,000)
Fiscal Year 1990: ¥900,000 (Direct Cost: ¥900,000)
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| Keywords | Digital Filter / Image Processing / Multi-processor / SIMD Processor / State-Space Model / Moving Picture / Ring Coupled Processors / Block Processing / SIMSプロセッサ / デイジタルフィルタ |
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| Research Abstract |
Multi-processor implementation of fast two-dimensional digital filters and efficient filtering algorithms are developed. Picture plane is partitioned into blocks of P*Q samples and intra- and inter-block parallel processing s are simultaneously performed. The intra-block processing is based on Roesser's state-space model.
1. Synchronization of inter-block parallel processing.
Bi-directional (horizontal and vertical) and one directional (vertical) ring coupled processing systems are considered. The horizontal and vertical state variables computed from one block are transferred to the next right and top blocks respectively. Timing condition that each processing system has no waiting to receive state variables is established.
2. Algorithms for intra-block processing.
To increase the processing speed with decreasing of the number of operations per sample and with increasing parallel computation degree, zero-state and quasi zero-state block processing methods are proposed and compared with block processing method. Qusai block method is found to be superior to others.
3. Efficient processing system for denominator separable transfer function.
As the block state matrix of the filter has high sparsity, the rows and columns are interchanged respectively to reduce the matrix size. as a result, some raising of the throughput of the system and some reduction of the number of required processors are achieved.
4. Optimum design of one directional ring coupled system.
One directional system has advantage of lower frame latency than bi-directional system, where frame latency is defined as the time from beginning to the end of one frame processing. Optimum design conditions of the system to realize assigned throughput using minimum number of processors , i. e., the form and size of a block, number of simultaneously processed blocks, are found by computer simulation.
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