| Budget Amount *help |
¥1,900,000 (Direct Cost: ¥1,900,000)
Fiscal Year 1991: ¥900,000 (Direct Cost: ¥900,000)
Fiscal Year 1990: ¥1,000,000 (Direct Cost: ¥1,000,000)
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| Research Abstract |
As the first step in order to develop a semantic checking mechanism in integrated circuits, case study has been carried out for a VLSI control system ; an inverted pendulum control system. Here, in addition to the well known control algorithm for upstanding, several heuristic rules were introduced to avoid unreasonable control signal generation such like a signal toward disturbing stable upstanding. These rules have been tested using a fault simulator, which has been developed specifically to this studv on work station. Through the evaluation by simulation, heuristic rules have been scored from a view point of effectivity for hitting(or detecting)faulty situation. After iterating these heuristic rule introduction and screening by fault simulation, a few effective rules has been obtained, which can keep the inverted pendulum upstanding, even in the frequent intermittent fault. Next, the above mentioned rule based semantic checking mechanism has been evaluated in terms of hardware overhead ; cost, by actually designing controller in a register transfer level description. Here, two approaches were compared ; (1)separate implementation where normal controller element circuits and semantic checking circuits are mutually separated, and(2)merged implementation where normal element circuits and semantic checking circuits are realized as common hardware circuits. Apparently the approach(1)is more effective for this purpose but the research results showed that the approach(2)is also effective under intermittent fault condition. The hardware overhead depends on the rule set and from about 20 Based on the case study a systematic methodology toward designing VLSI's with semantic checking mechanism has been established, although some part in the methodology is still heuristic. As a conclusion, the effectiveness and reality of VLSI's with semantic checking mechanism have been confirmed through this study, which will contribute to the future ultra-reliable VLSI systems.
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