Research of Porallel Assisting System for Structured Programming Exercise
| Project/Area Number |
04650299
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| Research Category |
Grant-in-Aid for General Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Research Field |
情報工学
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| Research Institution | Kitami Institute of Technology |
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Principal Investigator |
FUJIWARA Yoshitaka Kitami Inst.of Tech., Fac.of Eng., Prof., 工学部, 教授 (20219067)
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| Co-Investigator(Kenkyū-buntansha) |
MATSUNISHI Toshiharu Kitami Inst.of Tech., Fac.of Eng., Asst., 工学部, 助手 (10113713)
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| Project Period (FY) |
1992 – 1993
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| Project Status |
Completed (Fiscal Year 1993)
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| Budget Amount *help |
¥1,900,000 (Direct Cost: ¥1,900,000)
Fiscal Year 1993: ¥600,000 (Direct Cost: ¥600,000)
Fiscal Year 1992: ¥1,300,000 (Direct Cost: ¥1,300,000)
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| Keywords | CAI / ITS / network type / structured programming / knowledge engineering / blackboard model / program slicing / 並列処理 |
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| Research Abstract |
A new CAI system for concurrently assisting the programming exercises by many students has been studied, in order to greatly improve the educational quality of the exercises. The study has been focused on to clarify a suitable system architecture and to develop an effective technique for assisting a well structured algorithm description. Main results obtained are as floows :
1. It was shown that the total behavior of the programming exercise was interpreted by a blackboard model when a "task", a tuple of student ID and exercise Id, was determined as the assisting and managing unit in the system. Next a new architecture for the assisting system was proposed on the basis of the "heirarchical multiplexed blackboard model", which was derived under the condition of various service programs with different access frequencies.
2. A cooperative distributed technique for assisting structured description of algorithms was presented by paying attention to the heirarchical structure of the descriptions by the flowchart language. Next heirarchical diagnosing method, consisting of expression error check, structural error check and logical error check, was developed for detecting various faults existing in the flowcharts.
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Report
(3 results)
Research Products
(4 results)
