Parallel Image Understanding System on Recursive Torus Architecture
| Project/Area Number |
05452359
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| Research Category |
Grant-in-Aid for General Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Research Field |
Intelligent informatics
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| Research Institution | KYOTO UNIVERSITY (1995)
Okayama University (1993-1994) |
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Principal Investigator |
MATSUYAMA Takashi Kyoto Univ., Graduate School of Engineering, Professor, 工学研究科, 教授 (10109035)
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| Co-Investigator(Kenkyū-buntansha) |
WADA Toshikazu Okayama University, Faculty of Engineering, Lecturer, 工学部, 講師 (00231035)
浅田 尚紀 岡山大学, 工学部, 助教授 (10167885)
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| Project Period (FY) |
1993 – 1995
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| Project Status |
Completed (Fiscal Year 1995)
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| Budget Amount *help |
¥7,500,000 (Direct Cost: ¥7,500,000)
Fiscal Year 1995: ¥1,500,000 (Direct Cost: ¥1,500,000)
Fiscal Year 1994: ¥1,700,000 (Direct Cost: ¥1,700,000)
Fiscal Year 1993: ¥4,300,000 (Direct Cost: ¥4,300,000)
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| Keywords | Parallel Image Understanding / Recursive Torus Architecture / Data Level Parallel Processing / Dynamic Image Analyis / Parallel Machine / Parallel Object Recognition / Parallel Data Transfer / Synchronization Mechanism / 並列画像解析アルゴリズム / 並列データ構造 / 分散協調型領域分割 / OR並列処理 / データレベル並列型処理 / OR並列型処理 |
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| Research Abstract |
The aim of this research is to develop hardware and software systems for parallel image understanding. We obtained the following results by three years project.
1.We designed a parallel image understanding machine RTA/1 (PE : 1,024) based on the Recursive Torus Architecture and developed a prototype machine RTA/0 with 17 Transputers.
2.Various fundamental hardware performances of RTA/1 were evaluated based on experimental results using RTA/0, which demonstrated the effectiveness of the architecture of RTA/1.
3.We proposed a scheme of data level parallel processing on RTA/1. Its performance was evaluated based on experiments using RTA/0, which proved utilities of the proposed scheme.
4.We implemented a parallel object recognition system on RTA/0 using parallel C language. Experimental results showed that very high level speed-up can be attained by our proposed hardware and software systems.
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Report
(4 results)
Research Products
(12 results)
