A large-scale optimization stochastic method with adaptation and its application to VLSI layout
| Project/Area Number |
05650369
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| Research Category |
Grant-in-Aid for General Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Research Field |
System engineering
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| Research Institution | Chiba University |
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Principal Investigator |
HIRATA Hironori Chiba Univ., Faculty of Eng., Professor, 工学部, 教授 (60111415)
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| Co-Investigator(Kenkyū-buntansha) |
KOAKUTSU Seiichi Chiba Univ., Faculty of Eng., Research Associate, 工学部, 助手 (70241940)
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| Project Period (FY) |
1993 – 1994
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| Project Status |
Completed (Fiscal Year 1994)
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| Budget Amount *help |
¥2,200,000 (Direct Cost: ¥2,200,000)
Fiscal Year 1994: ¥600,000 (Direct Cost: ¥600,000)
Fiscal Year 1993: ¥1,600,000 (Direct Cost: ¥1,600,000)
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| Keywords | combinatorial optimization / genetic / layout of VLSI / floorplan / learning / stochastic method / 確率的手法 / 組合わせ最適化 / 学昭 / 配置 |
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| Research Abstract |
The project has studied the development of a new large-scale optimization method and applied to VLSI layout.
Practically speaking, we combined the simulated annealing methhod with gentic algorithm. This combination makes it possible to search a global minimum in the cost landscape. This method makes parallel computation possible using a parallel computer.
From the viewpoint of approximation, we studied mean field theory and got some useful results on the spead up of large-scale optimization.
We applied the proposed method to the VLSI layout of VLSI,such as floorplan. The simulation verified the effectiveness and usefulness of the method.
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Report
(3 results)
Research Products
(19 results)
