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Intelligent Image Processor based on neuron-MOS image sensor merged architecture

Research Project

Project/Area Number 06402038
Research Category

Grant-in-Aid for General Scientific Research (A)

Allocation TypeSingle-year Grants
Research Field Electronic materials/Electric materials
Research InstitutionTOHOKU UNIVERSITY

Principal Investigator

SIBATA Tadshi  Associate Professor, Dept.Electronic Engineering, Tohoku University, 工学部, 助教授 (00187402)

Co-Investigator(Kenkyū-buntansha) KOTANI Koji  Research Associate, Dept.Electronic Engineering, Tohoku University, 工学部, 助手 (20250699)
OHMI Tadahiro  Professor, Dept.Electronic Engineering, Tohoku University, 工学部, 教授 (20016463)
Project Period (FY) 1994 – 1995
Project Status Completed (Fiscal Year 1995)
Budget Amount *help
¥23,900,000 (Direct Cost: ¥23,900,000)
Fiscal Year 1995: ¥6,300,000 (Direct Cost: ¥6,300,000)
Fiscal Year 1994: ¥17,600,000 (Direct Cost: ¥17,600,000)
KeywordsImage processing / two-dimensional image sensor / real-time image recognition / motion vector detection / center-of-mass / neuron MOS transistor / Integrated circuit / 連想メモリ / ニューロンMOS / MPEG / focal plane processing / 差分絶対値回路 / CMOSプロセス / アナログ集積回路 / 4端子デバイス / ウィナー・テ-ク・オール
Research Abstract

An image captured on an image sensor chip has an enormous amount of information. It is spatially two-dimensional and, if motion is concerned, it becomes three dimensional because time axis is added. It is almost impossible to perform a real-time recognition of the image by a sequential computation on general purpose computers even if it is the most advanced one of today. The purpose of this research is to develop a basic hardware of integrated-circuit systems that can perform real-time intelligent image recognition. Two integrated circuits have been developed that can real-time detect and trace the movement of an object using a high-functionality device called Neuron MOS transistor (vMOS) as a key circuit element. The processing is conducted on two sets of one-dimensional data obtained by projecting a two-dimensional image data onto x- and y-axs. As a result, it has become possible to detect the motion vector between two successive frames within a few hundred nono secondS,which usually takes about a few tens miliseconds using plural of dedicated DSP chips. We also developed a circuit which can real-time track the position of the center of mass of a moving image. Owing to the vMOS circuit technology, such a processing can be done in several tens nano seconds using a very simple hardware. The characteristic feature of the vMOS integrated circuits is that it accepts analog signals, processing in analog/digital merged hardware computation and yields answers all in digital format. Therefore vMOS circuit technology provides an ideal interfacing between the real world and computer world.

Report

(3 results)
  • 1995 Annual Research Report   Final Research Report Summary
  • 1994 Annual Research Report
  • Research Products

    (39 results)

All Other

All Publications (39 results)

  • [Publications] T.Shibata: "A neuron MOS neural network using self-learning-compatible synapse circuits" IEEE Journal of Solid State Circuits. 30. 913-922 (1995)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] K.Kotani: "Impact of High-Precision Processing on the Functional Enhancement of Neuron MOS Integrated Circuits" IEICE Trans.Electronics. E79-C. 407-414 (1996)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] T.Ohmi: "Intelligence Jmplementation on Silicon Based on Four-Terminal Device Electronics" Microelectronics Journal. (採択済). (1997)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] K.Kotani: "Clocked-neuron MOS logic Circuits employing autothreshold adjustment" Digest of Technical Papers,IEEE International Solid-State Circuit Conference. 320-321 (1995)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] T.Ohmi: "Four-Terminal Device Electronics for Intelligent Silicon Integrated Systems" Extended Abstract,1995 International Conference on Solid-State Devices and Materials. 1-3 (1995)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] T.Shibata: "Neurotransistor:A neuron-like high functionality transistor implementing intelligance on Silicon" Proceedings,VLSI Signal Processing VIII. 28-37 (1995)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] T.Shibata: "Neuron MOS Temporal Winner Search Hardware for fully-parallel data processing" Advances in Neural Information Processing Systems.8. 685-691 (1996)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] T.Shibata: "Advances in Neuron MOS Applications" Digest of Technical Papers,IEEE International Solid-State Circuit Conference. 304-305 (1996)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] T.Shibata: "Neuron MOS Based Association Hardware for Real-Time Event Recognition" Proceedings of the 5-th International Conf,on Microelectronics for Neural Networks. 94-101 (1996)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] K.Kotani: "DC-Current free low-power A/D Conuerfer Cirautry Using Dynamic Latch Comparators with divided capacitance voltage rolerence" 1996 IEEE International Symposium on Circuit and Systems (ISCAS96). 205-208 (1996)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] M.Konda: "Neuron-MOS Correlator Based on Manhattan Distance Computation for Event Recognition Hardware" 1996 IEEE International Symposium on Circuit and Systems. 217-220 (1996)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] T.Shibata, H.Kosaka, H.Ishii, and T.Ohmi: ""A neuron-MOS neural network using self-learning-compatible synapse circuits"" IEEE J.Solid-State Circuits. Vol.30, No.8. 913-922 (1995)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] K.Kotani, T.shibata, and T.Ohmi: ""Impact of High-Precision Processing on the Functional Enhancement of Neuron-MOS Integrated Circuits"" IEICE Trans.Electron.Vol.E79-C,No.3. 407-414 (1996)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] T.Ohmi and T.Shibata: ""Intelligence Implementation on Silicon Based on Four-Terminal Device Electronics"" accepted for publication in the Special issue of the Microelectronics Journal "Advances in Microelectronics". (to be published).

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] K.Kotani, T.Shibata, M.Imai, T.Ohmi: ""Clocked-neuron-MOS logic circuits employing auto-threshold-adjustment, " in Digest of Technical papers" 1995 IEEE International Solid-State Circuits conference (ISSCC), San Francisco. FP 19.5. 320-321 (1995)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] T.Ohmi and T.Shibata: ""Four-Terminal Device Electronics for Intelligent Silicon Integrated Systems, "Extended Abstract" 1995 International Conference on Solid State Devices and Materials, Osaka. 1-3 (1995)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] T.Ohmi and T.Shibata: ""Intellligence Implementation on Silicon Based on Four-Terminal Device Electronics"" Proceedings, 20th International Conference on Microelectronics (MIEL'95), Nis, Servia, September. Vol.1. 11-18 (1995)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] T.Shibata and T.ohmi: ""Neutrotransistor : A Neuron-Like High functionality Transistor Implementing Intelligence on Silicon"" Proceedings, VLSI Signal Processing VIII Eds.T.Nishitani and K.K.Parhi (IEEE Signal Processing Society). 28-37 (1995)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] T.Shibata, T.Nakai, T.Morimoto, R.Kaihara, T.Yamashita, and T.Ohmi: ""Neuron-MOS Temporal Winner Search Hardware for Fully-Parallel Data Processing"" in Advances in Neural Information Processing Systems 8 (The MIT Press cambridge, Massachusetts). 685-691 (1996)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] T.Shibata, T.Nakai, N.M.Yu, Y.Yamashita, M.Konda, and T.Ohmi: ""Advances in Neuron-MOS Applications, " Digest of Technical Papers" 1996 IEEE International Solid-State-Circuit Conference, San Francisco, February. 304-305 (1996)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] T.Shibata, M.Konda, Y.Yamashita, T.Nakai, and T.Ohmi: ""Neuron-MOS Based Association Hardware for Real-Time Event recognition"" Proceedings of the Fifth International Conference on Microelectronics for Neural Networks and Fuzzy Systems (MicroNeuro'96), Lausanne February. 94-101 (1996)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] K.Kotani, T.Shibata, and T.Ohmi: ""DC-Current-Free Low-Power A/D Converter Circuitry Using Dynamic Lynamic Latch Comparators with Divided-Capacitance Voltage Reference"" 1996 IEEE International Symposium on Circuit and Systems (ISCAS 96), Atlanta. Vol.4. 205-208 (1996)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] M.Konda, T.Shibata, and T.Ohmi: ""Neuron-MOS Correlator Based on Manhattan Distance Computation for Event Recognition Hardware"" 1996 IEEE International Symposium on Circuit and Systems (ISCAS 96), Atlanta. Vol.4. 217-220 (1996)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] T.Nakai, T.Shibata, T.Yamashita, and T.Ohmi: ""A Neuron-MOS Data Sorting Circuit"" Proceedings of International Workshop on Advanced LSI's, SCALED DEVICE/PROCESS AND HIGH PERFORMANCE CIRCUITS,Cheju University, Korea. 188-193 (1995)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] M.Imai, K.Kotani, T.Shibata, and T.Ohmi: ""Clocked Neuron-MOS Circuit Technology for Highly-Reliable Logic Operations"" Proceedings of International Workshop on Advanced LSI's, SCALED DEVICE/PROCESS AND HIGH PERFORMANCE CIRCUITS,Cheju University, Korea. 194-199 (1995)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] 柴田道: "ニューロンMOSトランジスタで実現するしなやかな情報処理電子回路" 極限構造電子物性第151委員会第34回研究会資料. 40-48 (1995)

    • Related Report
      1995 Annual Research Report
  • [Publications] T.Nakai: "A Neuron MOS Data Sorting Circuit" Proc.International Woekshop on Advanced LSI'S 1995,Cheiju,Korea,July,1995. 188-193 (1995)

    • Related Report
      1995 Annual Research Report
  • [Publications] T.Ohmi: "Four-Terminal Electronics for Intelligent Silicon Integrated Systems" Ext.Abstract,1995 Int.Conf.Solid Stote Devices and Materials,Osaka,1995. 1-3 (1995)

    • Related Report
      1995 Annual Research Report
  • [Publications] T.Ohmi: "Intelligeme Implementation on Silicon Based on Four-Terminal Device Electronics" Proc.20th International Conf.on Microelectronics(MILE'95) Nis,Serbia,Sert.,1995. 11-18 (1995)

    • Related Report
      1995 Annual Research Report
  • [Publications] T.Shibata: "Neurotransistor:-A Neuron-Like High-Functionality Transistor Implementing Intelligence on Silicon" VLSI Signal Processing VIII,Proc.IEEE Signal Processing Society Workshop on VLSI Signal Processing,Sakai,Osaka,1995. 8. 28-37 (1995)

    • Related Report
      1995 Annual Research Report
  • [Publications] 柴田道: "バイナリ・多値・アナログ処理をゲートレベルで融合した新しい論理演算システム" 1995年電子情報通信学会エレクトロニクスソサエティ大会講演論文集2. 291-292 (1995)

    • Related Report
      1995 Annual Research Report
  • [Publications] T.Shibata: "Neuron-MOS Temporal Winner Search Hardware for Fully-Parallel Data Processing" Advancesin Neural Information Processing Systems. Vol.8(印刷中). (1996)

    • Related Report
      1995 Annual Research Report
  • [Publications] T.Shibata: "Advances in Neuron-MOS Applications" 1996 Digest of Technical Papers,IEEE Int.Solid-State Circuits Conference. 39. 304-305 (1996)

    • Related Report
      1995 Annual Research Report
  • [Publications] T.Shibata: "Neuron-MOS-Based Association Hardware for Real-Time Event-Recognition" Proc.Micro Neuro'96,Lausanne,Feb,1996. 94-101 (1996)

    • Related Report
      1995 Annual Research Report
  • [Publications] 柴田 直: "ニューロンMOSを用いた多値インテリジェントメモリ" Technical Report of IEICE. Spsy 94-14. 1-8 (1994)

    • Related Report
      1994 Annual Research Report
  • [Publications] T.Ohmi: "The concept of Four-Terminal Device and Its Significance in lmplementation of Intelligent Integrated Circuits" IEICE Trans.Electronics. E77-C. 1032-1041 (1994)

    • Related Report
      1994 Annual Research Report
  • [Publications] 中井 努: "大容量負荷高速駆動用CMOSソースフォロワ・バッファ回路の解析" Technical Report of IEICE. ED-94-63. 61-67 (1994)

    • Related Report
      1994 Annual Research Report
  • [Publications] 柴田 直: "センサとニューロンMOSの融合が拓く新しい世界" 第6回画像入力シンポジウム(SAIT'94)プロシ-デイング. 21-29 (1994)

    • Related Report
      1994 Annual Research Report
  • [Publications] K.Kotani: "Clocked-Neuron-MOS Logic Circuits Employing Auto-Threshold Adjustment" 1995 IEEE Int.solid state Circuits Conference Dig.Technical Papers. 320-321 (1995)

    • Related Report
      1994 Annual Research Report

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Published: 1994-04-01   Modified: 2016-04-21  

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