• Search Research Projects
  • Search Researchers
  • How to Use
  1. Back to previous page

Development of Comprehensive Set of LSI CAD Benchmarks

Research Project

Project/Area Number 06558041
Research Category

Grant-in-Aid for Developmental Scientific Research (B)

Allocation TypeSingle-year Grants
Research Field 計算機科学
Research InstitutionKYOTO UNIVERSITY

Principal Investigator

ONODERA Hidetoshi  Kyoto University, Graduate School of Engineering, Associate Professor, 工学研究科, 助教授 (80160927)

Co-Investigator(Kenkyū-buntansha) KANBARA Hiroyuki  ASTEM Kyoto, Researcher, 研究員
KOBAYASHI Kazutoshi  Kyoto University, Graduate School of Engineering, Instructor, 工学研究科, 助手 (70252476)
VASILY Moshnyaga  Kyoto University, Graduate School of Engineering, Lecturer, 工学研究科, 講師 (40243050)
YASUURA Hiroto  Kyushu University, Graduate School of Information Science and Electrical Enginee, システム情報科学研究科, 教授 (80135540)
TAMARU Keikichi  Kyoto University, Graduate School of Engineering, Professor, 工学研究科, 教授 (10127102)
Project Period (FY) 1994 – 1995
Project Status Completed (Fiscal Year 1995)
Budget Amount *help
¥7,200,000 (Direct Cost: ¥7,200,000)
Fiscal Year 1995: ¥2,800,000 (Direct Cost: ¥2,800,000)
Fiscal Year 1994: ¥4,400,000 (Direct Cost: ¥4,400,000)
KeywordsStandard Library / Symbolic Layout / LSI CAD / Comprehenseve Benchmarks / LSI Design / Standard Cell / Gate Array / ASIC
Research Abstract

We have developed a comprehensive set of benchmarks for quantitative evaluation of LSI CAD tools. The benchmark set describes the same circuit in several levels of abstraction so that we can set up any type of benchmarks freely. A standard set of process independent libraries has been developed for the benchmark set. KUE-CHIP2 is selected for the first candidate of the comprehensive set of benchmarks.
Our achivements are summarized as follows.
1.The development of standard set of libraries
We have developed a standard set of process independent libraries in a form of CMOS standard cell libraries. The library set is intended to use in comprehensive benchmarks, and also for public domain free libraries for research and educational use. The standard library is not a single set of libraries but a set of library generation tools that automatically produce process specific libraries from several process parameters. Symbolic layout method is used for layout generation. Delay and power dissipation characteristics are analzed by a new analytical method that considers short circuit currents during signal transition. The standard libraries are verified by simulation and also by a test chip.
2.Development of a comprehensive set of benchmarks
As the first example of the comprehensive benchmark set, we have selected KUE-CHIP2 which is a 8-bit micro processor developed for educational use. VHDL description of KUE-CHIP2 has been developed and verified by a set of test patterns for functional verification which is supplied with its original UDL/I model.
3.Evaluation of a comprehensive set of benchmarks
The KUE-CHIP2 benchmark has been evaluated by performing logic synthesis down to automatic layout with the standard libraries. It is successfully evaluated using Design Compiler of Synopsis (logic synthesis) and Alliance (automatic layout).

Report

(3 results)
  • 1995 Annual Research Report   Final Research Report Summary
  • 1994 Annual Research Report
  • Research Products

    (21 results)

All Other

All Publications (21 results)

  • [Publications] H. Onodera: "Compaction with Shape Optimization" Proc. IEEE CICC. 545-548 (1994)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] H. Onodera: "Model-Adaptable MOSFET Parameter Extraction Method Using a Common Intermediate Model" Proc. IEEE ASIC Conf.323-326 (1994)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] H. Onodera: "Compaction with Shape Optimization and its Application to Layout Recycling" IEICE Trans. Fundamentals. E78-A. 169-176 (1995)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] H. Onodera: "Model-Adaptable MOSFET Parameter Extraction System" IEICE Trans. Fundamentals. E78-A. 569-572 (1995)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] 小野寺秀俊: "中間モデルを用いたモデル依存性の小さいMOSFETパラメータ抽出手法" 電子情報通信学会論文誌A. J78-A. 1133-1141 (1995)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] H. Onodera: "Estimation of Short Circuit Power Dissipation for Static CMOS Gates" IEICE Trans. Fundamentals. E78-A. (1996)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] H. Onodera: "Estimation of Short-Circuit Power Dissipation and Its Influence on Propagation Delay for Static CMOS Gates" Proc. IEEE ISCAS. (発表予定). (1996)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] H.Onodera: "Compaction with Shape Optimization" Proc.IEEE CICC. 545-548 (1994)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] H.Onodera: "Model-Adaptable MOSFET Parameter Extraction Method Using a Common Intermediate Model" Proc.IEEE ASIC Conf.323-326 (1994)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] H.Onodera: "Compaction with Shape Optimization and its Application to Layout Recycling" IEICE Trans.Fundamentals. Vol.E78-A. 169-176 (1995)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] H.Onodera: "Model-Adaptable MOSFET Parameter Extraction System" IEICE Trans.Fundamentals. Vol.E78-A. 569-572 (1995)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] H.Onodera: "Model-Adaptable MOSFET Parameter Extraction Method Using a Common Intermediate Model" IEICE Trans.Fundamentals. Vol.J78-A. 1133-1141 (1995)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] H.Onodera: "Estimation of Short Circuit Power Dissipation for Static CMOS Gates" IEICE Trans.Fundamentals. Vol.E79-A. (1996)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] H.Onodera: "Estimation of Short-Circuit Power Dissipation and Its Influence on Propagation Delay for Static CMOS Gates" Proc.IEEE ISCAS. (to appear). (1996)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1995 Final Research Report Summary
  • [Publications] H.Onodera: "Model-Adaptable MOSFET Parameter Extraction System" IEICE Trans. Fundamentals. E78-A. 569-572 (1995)

    • Related Report
      1995 Annual Research Report
  • [Publications] 小野寺秀俊: "中間モデルを用いたモデル依存性の小さいMOSFETパラメータ抽出手法" 電子情報通信学会論文誌A. J78-A. 1133-1141 (1995)

    • Related Report
      1995 Annual Research Report
  • [Publications] H.Onodera: "Estimation of Short Circuit Power Dissipation for Static CMOS Gates" IEICE Trans. Fundamentals. E79-A. (1996)

    • Related Report
      1995 Annual Research Report
  • [Publications] H.Onodera: "Estimation of Short-Circuit Power Dissipation and Its Influence on Propagation Delay for Static CMOS Gates" Proc. IEEE ISCAS 発表予定. (1996)

    • Related Report
      1995 Annual Research Report
  • [Publications] H.Onodera: "Compaction with Shape Optimization" Proc.IEEE CICC. 545-548 (1994)

    • Related Report
      1994 Annual Research Report
  • [Publications] H.Onodera: "Model-Adaptable MOSFET Parameter Extraction Method Using a Common Intermediate Model" Proc.IEEE ASIC Conf.323-326 (1994)

    • Related Report
      1994 Annual Research Report
  • [Publications] H.Onodera: "Compaction with Shape Optimization and its Application to Layout Recycling" IEICE Trans.Fundamentals. E78-A. 169-176 (1995)

    • Related Report
      1994 Annual Research Report

URL: 

Published: 1994-04-01   Modified: 2016-04-21  

Information User Guide FAQ News Terms of Use Attribution of KAKENHI

Powered by NII kakenhi