| Project/Area Number |
07555418
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| Research Category |
Grant-in-Aid for Scientific Research (A)
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| Allocation Type | Single-year Grants |
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| Section | 展開研究 |
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| Research Field |
電子デバイス・機器工学
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| Research Institution | Tokyo University of Agriculture and Technology |
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Principal Investigator |
KUROIWA Koichi Faculty of Tech., Tokyo University of Agriculture and Technology, Prof., 工学部, 教授 (20170102)
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| Co-Investigator(Kenkyū-buntansha) |
KOMATSU Shu-ichi Toshiba corporation, Researcher, 材料デバイス研究所, 研究主幹
TARUI Yasuo WASEDA University, Science & Engineering, Prof., 大学院・理工学研究科, 教授 (10143629)
UENO Tomo Faculty of Tech., Tokyo University of Agriculture and Technology, Lecturer, 工学部, 講師 (90223487)
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| Project Period (FY) |
1995 – 1997
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| Project Status |
Completed (Fiscal Year 1997)
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| Budget Amount *help |
¥3,500,000 (Direct Cost: ¥3,500,000)
Fiscal Year 1997: ¥1,200,000 (Direct Cost: ¥1,200,000)
Fiscal Year 1996: ¥2,300,000 (Direct Cost: ¥2,300,000)
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| Keywords | Ferroelectric films / non-volatile memory / PZT / perovskite structure / digital-MOCVD / 強誘電体薄膜 / ペロブスカイト |
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| Research Abstract |
Recently, ferroelectric thin films such as Lead based perovskite structure have been actively studied as one of the promising materials for capacitor dielectric films in dynamic random-access memories (DRAMs) and ferroelectric random-access memories (FeRAMs), and for gate insulators in ferroelectric-gate FETs with metal-ferroelectric-semiconductor (MFS) gate structure. In particular, MFS-FET is expected to be one of the leading candidates for the future memory devices because of its non-volatility, high switching speed, high integration without storage capacitors, and so on. However, there have been few satisfactory results regarding fabrication of ferroelectric thin films directly on Si substrates, because there have been difficulties in the formation of ferroelectric/Si interfaces due to interdiffusions and lattice mismatches between them. ln this research. Pb(Zr, Ti)O_3 (PZT)/MgO/Si(0O1) stacked structure, which is one of the principle components of ferroelectric-gate FETs, has been fabricated and characterized. Using both the theta-2theta and the 2-dimensional X-ray diffraction (XRD) method, the fully epitaxial relationship of PZT[100]//MgO[100]//Si[110] has been confirmed in the PZT(001)/MgO(001)/Si(001) stacked structure fabricated with the maximum processing temperature of 480ﾟC.The fully epitaxial relationship causes no affection on the electrical properties of PZT and Si. Especially for MgO/Si interfaces, itwould make possible to control the surface potential of Si by the gate voltages in ferroelectric-gate FETs.
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