| Project/Area Number |
08455150
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Electronic materials/Electric materials
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| Research Institution | Himeji Institute of Technology |
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Principal Investigator |
NIU Hirohiko Himeji Institute of Technology, Faculty of Engineering, Professor, 工学部, 教授 (40047618)
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| Co-Investigator(Kenkyū-buntansha) |
FUJISAWA Hironori Himeji Institute of Technology, Faculty of Engineering, Research Assistant, 工学部, 助手 (30285340)
SHIMIZU Masaru Himeji Institute of Technology, Faculty of Engineering, Associate Professor, 工学部, 助教授 (30154305)
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| Project Period (FY) |
1996 – 1997
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| Project Status |
Completed (Fiscal Year 1997)
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| Budget Amount *help |
¥6,300,000 (Direct Cost: ¥6,300,000)
Fiscal Year 1997: ¥2,800,000 (Direct Cost: ¥2,800,000)
Fiscal Year 1996: ¥3,500,000 (Direct Cost: ¥3,500,000)
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| Keywords | MFS-Device / Ferroelectric thin films / Semiconductor interface / MOCVD / PZT thin films / Ir electrode / MFS型デバイス / 強誘電体 / Ir |
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| Research Abstract |
This study has been performed on the interfacial phenomena that heve become of considerable importance in the development of new memory devices by technologically combining ferroelectirc films with silicon devices. The Pb (Zr, Ti) O_3 (PZT) films by MOCVD were used as the experimental ferroelectric species. The importan knowledge derived from this study can be briefly summarized as follows.
1.Good step coverage (76-93%) was obtained for thin PZT films depostied on Ir/SiO_2, whereas deformation of Pt/SiO_2 steps was observed when PZT films were deposited at 600ﾟC ; this deformation was mainly caused by the diffusion of Pb into the steps.
2.This conductive films of Ir and/or Iro_2 on SiO_2/Si playd the role of an effective barrier in suppressing diffusion of the PZT elements into SiO_2 and, with bottom electrodes composed of them good polarization-fatigue properties were confirmed for the PZT capacitors on SiO_2/Si.
3.For Metal/Ferroelectric/Semiconductor type field effect transister (MFS-FET) to succeed as a non-voltaic memory, two serious difficulties must be overcome : (1) the amount of carrier traps existing at the F/S intreface must be small enough for the field effect to operata well at the S side.
(2)The gate F Of MFS-FET must be designed so that ferroelectric remnant Polarization can operate effectively on the FET channel. The difficulty (1) can be surmounted by high dielectric constant of the F film, while initially, regarding (2), a further investigation will be needed to give more detailed descriptions of the electrical properties of F film or F Capacitor.
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