• Search Research Projects
  • Search Researchers
  • How to Use
  1. Back to previous page

Research of 3 Dimensional (3D) MOSFET's operation mechanism for future LSI

Research Project

Project/Area Number 08455158
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypeSingle-year Grants
Section一般
Research Field 電子デバイス・機器工学
Research InstitutionTOHOKU UNIVERSITY

Principal Investigator

ENDOH Tetsuo  Research Institute of Electrical Communication, TOHOKU UNIVERSITY Assistant Professor, 電気通信研究所, 助教授 (00271990)

Co-Investigator(Kenkyū-buntansha) MASUOKA Fujio  Research Institute of Electrical Communication, TOHOKU UNIVERSITY Professor, 電気通信研究所, 教授 (50270822)
Project Period (FY) 1996 – 1998
Project Status Completed (Fiscal Year 1998)
Budget Amount *help
¥7,800,000 (Direct Cost: ¥7,800,000)
Fiscal Year 1998: ¥500,000 (Direct Cost: ¥500,000)
Fiscal Year 1997: ¥700,000 (Direct Cost: ¥700,000)
Fiscal Year 1996: ¥6,600,000 (Direct Cost: ¥6,600,000)
KeywordsMOS Transistor / 3-Demensional MOS Transistor / Voltage Current Characteristics / Threshold Voltage / Mobility / MOSトランジスター / 3次元MOSトランジスター
Research Abstract

(1) Study of operation mechanism for 3 dimensions (3D) metal oxide semiconductor (MOS) transistor
We analyzed operation mechanism of SGT type 3 D MOS transistors. Especially, we analyzed the dependence of the static 1-V characteristic for SGT type 3D MOS transistor on the device structure, for example, silicon pillar diameter, and gate oxide thickness. As a result, I was able to extract the construction parameters that are fixed performance of SGT type 3D MOS transistor.
Conclusions
With using these analysis results until this year, we propose new models of operation mechanism for SGT type MOS transistor. Especially, It was successful in formulations making the voltage-current characteristics of SGT type MOS transistor. As a result, we made clear the factors that limit operation speed, operation power and small size for a future 3D MOS transistor. The results are very important for a future LSI.

Report

(4 results)
  • 1998 Annual Research Report   Final Research Report Summary
  • 1997 Annual Research Report
  • 1996 Annual Research Report
  • Research Products

    (12 results)

All Other

All Publications (12 results)

  • [Publications] 遠藤哲郎: "完全空乏型Double-Gate SOI MOSFETの短チャネル効果の解析及びスケーリング理論の提案" 電気情報通信学会論文誌C-II. J82-C-II・No.2. 72-73 (1999)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1998 Final Research Report Summary
  • [Publications] Tetsuo ENDOH: "An Accurate Model of Fully-Depleted Surrounding Gate Transistor(FD-SGT)" IEICE TRANSACTIONS ON ELECTRONICS. E80-C・No.7. 905-910 (1997)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1998 Final Research Report Summary
  • [Publications] Tetsuo ENDOH: "An Analytic Steady-State Current-Voltage Characteristics of Short Channel Fully-Depleted Surrounding Gate Transistor(FD-SGT)" IEICE TRANSACTIONS ON ELECTRONICS. E80-C・No.7. 911-917 (1997)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1998 Final Research Report Summary
  • [Publications] Tetsuo ENDOH: "Analysis of short channel effects and proposal of scaling theory in Fully-Depleted Double-Gate SOI MOSFET" IEICE TRANSACTIONS ON ELECTRONICS C-II. J82-C-II,No.2. 72-73 (1999)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1998 Final Research Report Summary
  • [Publications] Tetsuo ENDOH: "An Accurate Model of Fully-Depleted Surrounding Gate Transistor (FD-SGT)" IEICE TRANSACTIONS ON ELECTRONICS. E80-C,No.7. 905-910 (1997)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1998 Final Research Report Summary
  • [Publications] Tetsuo ENDOH: "An Analytic Steady-State Current-Voltage Characteristics of Short Channel Fully-Depleted Surrounding Gate Transistor (FD-SGT)" IEICE TRANSACTIONS ON ELECTRONICS. E80-C,No.7. 911-917 (1997)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1998 Final Research Report Summary
  • [Publications] 遠藤 哲郎: "完全空乏型 Double-Gate SOI MOSFETの短チャネル効果の解析及びスケーリング理論の提案" 電気情報通信学会論文誌C-II. J82-C-II・No.2. 72-73 (1999)

    • Related Report
      1998 Annual Research Report
  • [Publications] Tetsuo ENDOH: "An Accurate Model of Fully-depleted Surrounding Gate Transistor(FD-SGT)" IEICE TRANSACTIONS ON ELECTRONICS. E-80-C・No.7. 905-910 (1997)

    • Related Report
      1998 Annual Research Report
  • [Publications] Tetsuo ENDOH: "An Analytic Steady-State Current-Voltage Characteristics of Short Channel Fully-Depleted Surrounding Gate Transistor(FD-SGT)" IEICE TRANSACTIONS ON ELECTRONICS. E-80-C・No.7. 911-917 (1997)

    • Related Report
      1998 Annual Research Report
  • [Publications] 遠藤, 哲郎: "Multi-SGTの高速動作に関する解析" 電子情報通信学会論文誌C-II. J80-C-II・No.8. 284-285 (1997)

    • Related Report
      1997 Annual Research Report
  • [Publications] Tetsuo, ENDOH: "An Accurte Model of Fully-Depleted Surrounding Gate Transistor(FD-SGT)" IEICE TRANS.ELECTRON.E80-C・No.7. 905-910 (1997)

    • Related Report
      1997 Annual Research Report
  • [Publications] Tetsuo ENDOH: "An Analytic Steady-State Current-Voltage Characteristics of Short Channel Fully-Depleted Surrounding Gate Transistor(FD-SGT)" IEICE TRANS.ELECTRON.E80-C・No.7. 911-917 (1997)

    • Related Report
      1997 Annual Research Report

URL: 

Published: 1996-04-01   Modified: 2016-04-21  

Information User Guide FAQ News Terms of Use Attribution of KAKENHI

Powered by NII kakenhi