DEVELOPMENT OF TUNNELING-CURRENT-CONTROLLED THIN FILM TRANSISTORS APPLYING SCHOTTKY CONTACTS
| Project/Area Number |
08555086
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| Research Category |
Grant-in-Aid for Scientific Research (A)
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| Allocation Type | Single-year Grants |
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| Section | 展開研究 |
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| Research Field |
電子デバイス・機器工学
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| Research Institution | FUKUI UNIVERSITY OF TECHNOLOGY (1997)
Osaka University (1996) |
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Principal Investigator |
SHIRAFUJI Junji FUKUI UNIVERSITY OF TECHNOLOGY,FACULTY OF ENGINEERING,PROFESSOR, 工学部, 教授 (70029065)
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| Co-Investigator(Kenkyū-buntansha) |
YOSHINOUCHI Jun SHARP CORP., LIQUID CRYSTAL LABORATORY,EX-MANAGER, 液晶研究所, 主任研究員
HATTORI Reiji KYUSHU UNIVERSITY,GRADUATE SCHOOL OF INFORMATION SCIENCE AND ELECTRICAL ENGINEER, 大学院・システム情報科学研究科, 助教授 (60221503)
SUGINO Takashi OSAKA UNIVERSITY,GRADUATE SCHOOL OF ENGINEERING,ASSOCIATE PROFESSOR, 工学研究科, 助教授 (90206417)
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| Project Period (FY) |
1996 – 1997
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| Project Status |
Completed (Fiscal Year 1997)
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| Budget Amount *help |
¥7,000,000 (Direct Cost: ¥7,000,000)
Fiscal Year 1997: ¥2,000,000 (Direct Cost: ¥2,000,000)
Fiscal Year 1996: ¥5,000,000 (Direct Cost: ¥5,000,000)
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| Keywords | Schottky Barrier / Tunneling Current / Thin Film Transistor / Polysilicon / Leakage Current / Silicide / Flat Panel Display / フラットディスプレイ |
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| Research Abstract |
We made attempts to develop tunneling-current controlled thin film transistor (TFTs) applying Schottky contacts at source and drain, and obtained the results as follws :
(1)Improvements of fabrication process for Schottky contacts in poly-Si TFTs
Pd silicide which was prepared by evaporating Pd and annealing at 250ﾟC was found to be most suitable for Schottky contacts. However, there was still a problem in which the source/drain was short-circuited to the gate electrode due to the deposited Pd on the side wall of gate insulator. This problem was solved by improving the progress in the following way.
・The etching period for removing native oxide before Pd evaporation was increased in order to assure sufficient side-etching of the gate oxide.
・The thickness of Pd was minimized to form silicide entirely during the annealing at 250ﾟC.
(2)Operation as a p-channel conventional FET
Although the tunneling-current-controlled TFTs were found to have a high transconductance, a large leakage current was observed because of hole injection from the drain. However, when the TFTs were operated in conventional p-channel FET mode, the hole field-effect mobility as high as 15 cm^2/Vs was achieved with a low leakage surrent. This value can be well compared to those for electrons of 20 cm^2/Vs in conventional n-channel poly-Si TFTs. This result may suggest tunneling-current-controlled mode to be suitable for p-channel FETs with a high transconductance.
3)Precise measurement of contact resistance at source/drain with Schottky barrier contact by Gate-Four-Probe method
We measured precisely the contact resistance at source/drain with Schottky barrier contact using a Gate-Four-Probe method. It was found that the contact resistance decreased exponentially with increasing gate voltage ; this confirmed that the tunneling-current through the Schottky barrier was able to be controlled by gate voltage.
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Report
(3 results)
Research Products
(3 results)
