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Hardware implementation of trellis-coded co-channel interference canceller for microcelluar radio

Research Project

Project/Area Number 08555091
Research Category

Grant-in-Aid for Scientific Research (A)

Allocation TypeSingle-year Grants
Section展開研究
Research Field 情報通信工学
Research InstitutionKYOTO UNIVERSITY

Principal Investigator

YOSHIDA Susumu  Kyoto University, Graduate School of Eng., Professor, 工学研究科, 教授 (50026324)

Co-Investigator(Kenkyū-buntansha) MURATA Hidekazu  Kyoto Univeristy, Graduate School of Eng., Research associate, 工学研究科, 助手 (60252475)
SUZUKI Hiroshi  Tokyo Institute of Technology, International Cooperation Center for Science and, 理工学国際交流センター, 教授 (00282864)
Project Period (FY) 1996 – 1997
Project Status Completed (Fiscal Year 1997)
Budget Amount *help
¥11,500,000 (Direct Cost: ¥11,500,000)
Fiscal Year 1997: ¥4,900,000 (Direct Cost: ¥4,900,000)
Fiscal Year 1996: ¥6,600,000 (Direct Cost: ¥6,600,000)
Keywordsmobile radio / fading channel / co-channel interference / interference canceller / hardware inplementation / PLD / laboratory experiment / トレリス符号化変調 / マイクロセル / 信号処理
Research Abstract

In order to realize high speed transmission in digital mobile communications, the design trials of equalizers and co-channel interference cancellers are being investigated actively. Nonlinear co-channel interference canceller which uses path diversity has been proved to be an effective method against multipath propagation causing frequency selective fading in high speed transmission. The trellis-coded co-channel interference canceller (TCC) is well-known to yield a superior path diversity effect and co-channel interference cancelling capability, but the computational complexity increases rapidly when the multipath delay becomes large. In this research, by reducing the computational bits in the circuit, and simplifying the calculation complexity without sacrificing the performance, we successfully designed a small-scale, high speed adaptive TCC.This TCC is realized on a FPGA circuit. Its operation and processing speed have been confirmed to be consistent with the design goal.

Report

(3 results)
  • 1997 Annual Research Report   Final Research Report Summary
  • 1996 Annual Research Report
  • Research Products

    (24 results)

All Other

All Publications (24 results)

  • [Publications] H.Murata: "Trellis-coded co-channel interference canceller for microcellular radio" IEEE Trans.Commun.COM-45. 1088-1094 (1997)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1997 Final Research Report Summary
  • [Publications] H.Murata: "Joint frequency offset and delay profile estimation technique for maximum-likelihood sequence estimation" Proc.of 1st IEEE International Conference on Information,Communications & Signal Processing(ICICS'97). 1327-1330 (1997)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1997 Final Research Report Summary
  • [Publications] H.Murata: "Co-channel interference canceller for interleaved coded modulation in the presence of intersymbol interference" to appear in Proc.of 48th IEEE Vehicular Technology Conference. (1998)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1997 Final Research Report Summary
  • [Publications] Y.Li: "Theoretical analysis of BER performance bounds of trellis-coded co-channel interference canceller" to be published in IEICE Trans.Commun.(1998)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1997 Final Research Report Summary
  • [Publications] H.Murata: "Trellis-coded co-channel interference canceller with interleaving" to be published in IEICE Trans.Commun.(1998)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1997 Final Research Report Summary
  • [Publications] 北川 恵一: "FPGAを用いた2Mbps実時間処理可能な適応MLSEの試作" 電子情報通信学会技術研究報告. RCS97-83. 15-20 (1997)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1997 Final Research Report Summary
  • [Publications] H.Murata and S.Yoshida: "Trellis-coded co-channel interference canceller for microcellular radio" IEEE Trans.Commun., COM45. No.9. 1088-1094 (1997)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1997 Final Research Report Summary
  • [Publications] H.Murata and S.Yoshida: "Joint frequency offset and delay profile estimation technique for maximum-likelihood sequence estimation" Proc.of 1st IEEE International Conference on Information, Communications & Signal Processing (ICICS'97). 1327-1330 (1997)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1997 Final Research Report Summary
  • [Publications] H.Murata, Y.Matsumura and S.Yoshida: "Co-channel interference canceller for interleaved coded modulation in the presence of intersymbol interference" Proc.of 48th IEEE Vehicular Technology Conference. (to appear). (1998)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1997 Final Research Report Summary
  • [Publications] Y.Li, H.Murata and S.Yoshida: "Theoretical analysis of BER performance bounds of trellis-coded co-channel interference canceller" IEICE Trans.Commun. (to be published). (1998)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1997 Final Research Report Summary
  • [Publications] H.Murata, Y.Matsumura and S.Yoshida: "Trellis-coded co-channel interference canceller with interleaving" IEICE Trans.Commun.(to be published). (1998)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1997 Final Research Report Summary
  • [Publications] K.Kitagawa, A.Okazaki, H.Murata and S.Yoshida: "Implementation of 2Mbps adaptive MLSE using FPGA (in Japanese)" Technical Reports of IEICE of Japan. RCS97-83. 15-20 (1997)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1997 Final Research Report Summary
  • [Publications] H.Murata: "Trellis-coded co-channel interfernce canceller for microcellular radio" IEEE Trans.Commun.COM-45. 1088-1094 (1997)

    • Related Report
      1997 Annual Research Report
  • [Publications] H.Murata: "Joint frequency offset and delay profile estiation technique for maximum-likelihood sequence estimation" Proc.of 1st IEEE International Conference on Information,Communications & Signal Processing (ICIS'97). 1327-1330 (1997)

    • Related Report
      1997 Annual Research Report
  • [Publications] H.Murata: "Co-channel interference canceller for interleaved coded modulation in the presence of intersymbol interference" to appear in Proc.of 48th IEEE Vehicular Technology Conference. (1998)

    • Related Report
      1997 Annual Research Report
  • [Publications] Y.Li: "Theoretical analysis of BER performance bounds of trellis-coded co-channel interference canceller" to be published in IEICE Trans.Commun.(1998)

    • Related Report
      1997 Annual Research Report
  • [Publications] H.Murata: "Trellis-coded co-channel interference canceller with interleaving" to be published in IENCE Trans.Commun.(1998)

    • Related Report
      1997 Annual Research Report
  • [Publications] 北川 恵一: "FPGAを用いた2Mbps実時間処理可能な適応MLSEの試作" 電子情報通信学会技術研究報告. RCS97-83. 15-20 (1997)

    • Related Report
      1997 Annual Research Report
  • [Publications] Hidekazu Murata: "Maximum-likelihood sequence estimation for coded modulation in the presence of co-channel interference and intersymbol interference" Proc.of 46th IEEE Vehicular Technology Conference(VTC'96). 701-705 (1996)

    • Related Report
      1996 Annual Research Report
  • [Publications] 岡崎彰浩: "DDFSEを用いた4状態4タップ対応MLSEの特性" 電子情報通信学会ソサイエティ大会. B-419. 420-420 (1996)

    • Related Report
      1996 Annual Research Report
  • [Publications] 北川恵一: "2Mbps実時間処理可能な3シンボル遅延等化適応MLSEの設計" 電子情報通信学会ソサイエティ大会. SB-3-3. 547-548 (1996)

    • Related Report
      1996 Annual Research Report
  • [Publications] 村田英一: "インタリーブを用いたトレリス符号化同一チャネル干渉波キャンセラの演算量削減法" 電子情報通信学会技術研究報告. RCS96-104. 37-44 (1996)

    • Related Report
      1996 Annual Research Report
  • [Publications] Yuan Li: "Theoretical analysis of BER Performance bounds of trellis-coded co-channel interference canceler" 電子情報通信学会技術研究報告. RCS96-1997. 15-22 (1997)

    • Related Report
      1996 Annual Research Report
  • [Publications] 北村尚志: "干渉キャンセラにおける伝搬路推定アルゴリズムの動作パラメータ適応化" 電子情報通信学会総合大会. B-5-1997. (1996)

    • Related Report
      1996 Annual Research Report

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Published: 1996-04-01   Modified: 2016-04-21  

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