STUDY ON SCHOTTKY TUNNEL TRANSISTOR
| Project/Area Number |
08650410
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
電子デバイス・機器工学
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| Research Institution | TOHOKU GAKUIN UNIVERSITY |
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Principal Investigator |
KIMURA Mitsuteru TOHOKU GAKUIN UNIV.ENGINEERING,PROFESSOR, 工学部, 教授 (10048811)
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| Co-Investigator(Kenkyū-buntansha) |
SUGAWARA Fumihiko TOHOKU GAKUIN UNIV.ENGINEERING,ASSOCIATE PROFESSOR, 工学部, 助教授 (70171139)
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| Project Period (FY) |
1996 – 1997
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| Project Status |
Completed (Fiscal Year 1997)
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| Budget Amount *help |
¥800,000 (Direct Cost: ¥800,000)
Fiscal Year 1997: ¥800,000 (Direct Cost: ¥800,000)
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| Keywords | TRANSISTOR / SCHOTTKY DIODE / TUNNEL / TUNNEL TRANSISTOR / NOS / MOS GATE / SILICON DEVICE / MOS TRANSISTOR / シリコン |
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| Research Abstract |
Schottky tunnel transistor will have a potential to be a break-through device for ULSI devices such as DRAM,because this device will overcomes the short channel effects which has prevented to more miniaturize MOSFETs and is positioned between single-electron transistor expected as a future transistor and existing most miniaturized MOSFET.In 1996 we studied about following items : 1.Protection of the gate oxide film by formation of the Zener diode, 2.Selections of Schottky barrier metal and gate metal taking account of device fabrication process, 3.Experimental studies on Schottky tunnel current near zero bias voltage for the model of the Schottky tunnel current flow. In above studies the fundamental characteristics of the Schottky tunnel transistor was obtained, and it was confirmed to overcome the short channel effects accompanied in the reduction of the channel length as expected. This Schottky tunnel transistor has a simple structure in which a very short MOS gate is overlayd on the junction of the Schottky tunnel diode. However, it has been clear that this Schottky tunnel transistor has too small Gm to use as a DRAM of ULSI.Therefore in 1997 we studied on about following items : 1.Studies on the reason why Gm is so small, 2.Studies on structures to vary the effective Schottky height as well as tunnelling length, 3.New structure of MOS-gate Schottky tunnel transistor with relatively large Gm and its fabrication. this new structure has a p+ layr of about 3 um thick between the Schottky metal and n+ surface layr in the substrate, and barrier height of this P+ layr is countrolled by the MOS gate voltage and electrons tunnel this barrier. This very thin p+ layr was fabrication by Al diffusion and alloy through the cobalt siliside layr as a schottky metal. As a result we have gotten the MOS gate-Schottky tunnel transistor with expected triode I-V characteristics.
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Report
(3 results)
Research Products
(30 results)
