| Project/Area Number |
09044125
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| Research Category |
Grant-in-Aid for international Scientific Research
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| Allocation Type | Single-year Grants |
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| Section | Joint Research |
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| Research Field |
計算機科学
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| Research Institution | TOHOKU UNIVERSITY |
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Principal Investigator |
HANYU Takahiro Tohoku University, Graduate School of Information Sciences, Associate Professor, 大学院・情報科学研究科, 助教授 (40192702)
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| Co-Investigator(Kenkyū-buntansha) |
LIN H.C. University of Maryland, Professor, 教授
NG Wai-Tung University of Toronto, Faculty of Applied Science and Engineering, Professor, 応用科学工学部, 助教授
GULAK Glenn University of Toronto, Faculty of Applied Science and Engineering, Professor, 応用科学工学部, 教授
SMITH Kenneth C. University of Toronto, Faculty of Applied Science and Engineering, Professor, 応用科学工学部, 教授
KAMEYAMA Michitaka Tohoku University, Graduate School of Information Sciences, Professor, 大学院・情報科学研究科, 教授 (70124568)
NG Wai Tung トロント大学, 助教授
SMITH Rennet トロント大学, 教授
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| Project Period (FY) |
1997 – 1998
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| Project Status |
Completed (Fiscal Year 1998)
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| Budget Amount *help |
¥3,100,000 (Direct Cost: ¥3,100,000)
Fiscal Year 1998: ¥1,200,000 (Direct Cost: ¥1,200,000)
Fiscal Year 1997: ¥1,900,000 (Direct Cost: ¥1,900,000)
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| Keywords | Multiple-valued content-addressable memory (CAM) / Floating-gate-MOS pass-transistor network / Threshold operation / Logic-in-memory VLSI architecture / Non-numeric data processing / Fully parallel processing / Magnitude comparison / Intelligent information processing |
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| Research Abstract |
Real-world applications need to achieve very quick response for dynamically changing real-world environment. Therefore, it is very important to develop a "Super Chip for Intelligent Integrated Systems." The emerging technologies of intelligent integrated systems for real-world applications rely increasingly on VLSI processors high degree of parallelism in various levels such as architectural, logic design, and circuit/device level. The following items are the themes discussed in this project : (1)Discussion about algorithm/system/architecture-level innovation : We have discussed about the efficiency of multiple-valued logic-in-memory VLSI as the development of fully parallel image processor for intelligent integrated systems. The basic idea of the multiple-valued logic-in-memory VLSI architecture is that the data which are frequently used in the communication between the processing element (PE) and the memory are stored into the local memory tightly connected to the PE.We also discussed about the efficiency of some concrete examples using such concept.
(2)Discussion about logic-design/circuit-design-level innovation : We have presented a floating-gate-MOS pass-transistor network as a circuit-level logic-in-memory VLSI architecture. We have discussed about the usefulness of such a new pass-transistor network and about its application areas. While a floating-gate MOS transistor is used as a multiple-valued storage element in the present VLSI system, some logical functions such as a threshold function and a pass-switch function are merged into the multiple-valued memory plane.
(3)Discussion about device/process-technology-level innovation : We have also discussed about the device technologies to realize the floating-gate-MOS pass-transistor network.
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