| Budget Amount *help |
¥8,900,000 (Direct Cost: ¥8,900,000)
Fiscal Year 1998: ¥3,900,000 (Direct Cost: ¥3,900,000)
Fiscal Year 1997: ¥5,000,000 (Direct Cost: ¥5,000,000)
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| Research Abstract |
The objective of this research project is to realize "learning" and "memory" functions, which are basic properties of neurons in human brains, by using silicon integrated circuits technology, In the first year (1997), we fabricated ferroelectric-gate field effect transistors (FETs) using ferroelectric SrBi_2Ta_2O_9 (SBT) film and demonstrated non-volatile memory function of the device, However, it was also found that the memory retention time was as short as 1 hour. Hence, in 1998, we analyzed the memory retention characteristics of the ferroelectric-gate FETs and showed that such short retention time was caused by mainly two reasons ; one is that depolarization field was applied during the retention time, and the second is that the operation point is on a minor loop of P-E characteristics of the ferroelectric film. To improve the retention characteristics, we fabricated metal-ferroelectric-metal-insulator-semiconductor (MFMIS) FETs. By using a small MFM capacitor on a large MIS structure, we found that the retention time was drastically improved up to more than 1 day. Next, we fabricated synaptic device which is a ferroelectric-gate FET matrix. It was demonstrated that the weighted sum operation, which is commonly used in neural networks, can be performed by the ferroelectric-gate FET matrix. Finally, we fabricated the neuron integrated circuits on SOT substrates using a ferroelectric FET with a uni-junction transistor, or CMOS Shmit-trigger pulse oscillation circuit. We have succeeded to demonstrate the learning function of the fabricated neuron circuit.
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