Investigation of nano meter scale MOS transistors for integrated circuits
| Project/Area Number |
09555107
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 展開研究 |
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| Research Field |
電子デバイス・機器工学
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| Research Institution | TOHOKU UNIVERSITY |
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Principal Investigator |
MASUOKA Fujio Research Institute of Electrical Communication, Tohoku University, Professor, 電気通信研究所, 教授 (50270822)
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| Co-Investigator(Kenkyū-buntansha) |
SAKURABA Hiroshi Research Institute of Electrical Communication, Tohoku University, Research Associate, 電気通信研究所, 助手 (60241527)
ENDOH Tetsuo Research Institute of Electrical Communication, Tohoku University, Assistant Professor, 電気通信研究所, 助教授 (00271990)
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| Project Period (FY) |
1997 – 1999
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| Project Status |
Completed (Fiscal Year 1999)
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| Budget Amount *help |
¥4,400,000 (Direct Cost: ¥4,400,000)
Fiscal Year 1999: ¥900,000 (Direct Cost: ¥900,000)
Fiscal Year 1998: ¥3,500,000 (Direct Cost: ¥3,500,000)
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| Keywords | Three-dimensional MOSFET / SGT / M-SGT / Flash memory / SGT Flash memory / M-SGTM-SGT |
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| Research Abstract |
(1) Proposal of a new three-dimensional MOS transistor structure and its operation principle.
A detailed analysis of the future-size SGT-type and M-SGT-type three-dimensional MOS transistor is given. The dependencies of operation characteristics on structural parameters and input voltage waveform are analyzed and summarized in a physical model of the future-size SGT-type and M-SGT-type three-dimensional MOS transistor. Accordingly, it is possible to evaluate quantitatively the main factors which limit operation speed, determine power consumption and packing density of the transistor structure.
(2) Proposal of a new circuit architecture and a new circuit layout for a three-dimensional MOS transistor
As a result, the operation speed and the power consumption of SGT and M-SGT type three dimensional MOS transistor can be evaluated quantitatively.
(3) Proposal of a three-dimensional Flash memory and the analysis of its operation mechanism
In this research we propose the Floating Channel type SGT (FC-SGT) Flash memory in order to achieve an increase in the packing density of flash memory devices. In FC-SGT Flash memory channel region is floating. By using two-dimensional device simulation, the transient dependence of the surface channel potential which determines the erase characteristics of the FC-SGT Flash memory device is clarified. As a result, FC-SGT Flash memory realizes bipolarity erase and program operation modes. Therefore the FC-SGT Flash memory achieves high packing density, low power consumption, high speed programming and highly reliable operation characteristics simultaneously. Especially, the program speed of the FC-SGT Flash memory is twice as high as the program speed of a conventional planar type Flash memory.
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Report
(4 results)
Research Products
(5 results)
