Investigation on Pileup of Arsenic and Antimony Ion-implanted into Silicon
| Project/Area Number |
09650358
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Electronic materials/Electric materials
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| Research Institution | HIROSHIMA UNIVERSITY |
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Principal Investigator |
SHIBAHARA Kentaro Hiroshima University, Research Center for Nanodevices and Systems Assoc. Prof., ナノデバイス・システム研究センター, 助教授 (50274139)
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| Co-Investigator(Kenkyū-buntansha) |
YOKOYAMA Shin Hiroshima University, Research Center for Nanodevices and Systems Prof., ナノデバイス・システム研究センター, 教授 (80144880)
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| Project Period (FY) |
1997 – 1998
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| Project Status |
Completed (Fiscal Year 1998)
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| Budget Amount *help |
¥3,200,000 (Direct Cost: ¥3,200,000)
Fiscal Year 1998: ¥1,400,000 (Direct Cost: ¥1,400,000)
Fiscal Year 1997: ¥1,800,000 (Direct Cost: ¥1,800,000)
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| Keywords | Silicon / Ion Implantation / Arsenic / Antimony / Pileup / ヒ素 |
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| Research Abstract |
Systematic evaluation on depth profiles and electrical characteristics of SbィイD1+ィエD1 or AsィイD1+ィエD1 implanted layer were carried out for various ion implantation conditions and annealing conditions. The obtained quantitative data will be a base to construct the models to describe behavior of the dopants during annealing. We proposed the Sb pileup model that Sb is transported by recrystallization caused by annealing in an amorphized layer produced by SbィイD1+ィエD1 ion implantation. By relatively low temperature (800-900 ℃) RTA (Rapid Thermal Processing), Sb pileup is suppressed. In the case of As, RTA was not effective for the pileup suppression. Sheet resistance of Sb implanted layer was improved by using RTA and increasing SbィイD1+ィエD1 dose to 500 Ω/sq. maintaining junction depth around 20 nm.
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Report
(3 results)
Research Products
(9 results)
