| Budget Amount *help |
¥3,300,000 (Direct Cost: ¥3,300,000)
Fiscal Year 1998: ¥1,100,000 (Direct Cost: ¥1,100,000)
Fiscal Year 1997: ¥2,200,000 (Direct Cost: ¥2,200,000)
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| Research Abstract |
In this project, we conducted a research on a high-level synthesis method which attempts to synthesize low-cost high-performance circuits for control dominant applications, such as modems, audio compression/decompresson systems, and video compression/decompression sys-tems.
We developed a prototype of a synthesis system. It takes, as an input, a behavioral pecification written in a subset of C language and generates an register transfer level VHDL code. The VHDL code can be further converted into VLSI layout using logic synthesis system and automatic layout system available in our research group. We applied our system to synthesize a number of circuits including an elliptic filter, air edge detection filter, and a part of MPEG audio processor. The program is CPU efficient but we found that circuits for data transfer and control circuits tend to become large.
As one way of resolving this problem, we tried an approach in which designer gives datapath configuration, i.e. functional units and their connectivity, and synthesizer generates control circuits. In this scheme we found that of binding, a task of assigning operations in the given program to functional units, becomes a key. We developed two algorithms to solve this problem efficiently.
We assume a VLIW type control for the synthesized circuits, in which the size of the control memory becomes a problem. We developed an algorithm to reduce the necessary memory size based on field partition on the control words.
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