| Budget Amount *help |
¥35,600,000 (Direct Cost: ¥35,600,000)
Fiscal Year 1999: ¥14,400,000 (Direct Cost: ¥14,400,000)
Fiscal Year 1998: ¥21,200,000 (Direct Cost: ¥21,200,000)
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| Research Abstract |
The purpose of this research project is to develop an ideal device structure for use in ultra-fast and ultra-high-density integrated circuit, I.e., gas isolated interconnect structure, metal-gate, high-permittivity gate insulator, metal-substrate SOI CMOS LSI. These technologies will increase integrated circuits operating frequency up to 20 GHz although 1 GHz was recognized as the upper limit in the present technology. In order to establish this device structure as industrial products, we have developed several excellent technologies based on the ultraclean processing concept, as follows :
I) Low-temperature Si epitaxial growth technology, II) Kr/OィイD22ィエD2 low-temperature oxidation technology, III) SiィイD23ィエD2NィイD24ィエD2 gate dielectric formation technology by microwave excited high-density plasma, IV) Low-temperature ultra-shallow source/drain junction formation technology, V) Low-resistivity bcc-phase Ta gate electrode formation technology by Xe plasma sputtering, VI) Giant-grain copper interconnects technology using TaNィイD22ィエD2 diffusion barrier layer, VII) Low-resistivity tantalum-silicided junction formation technology using Si-encapsulated silicidation technique, VIII) characterization technique of electrically active interface defects for SOI MOS device.
These results lead not only to the realization of ultrahigh-speed devices but also to the establishment of a number of advanced processing technologies which certainly will become the main stream in microelectronics in sub-100 nm era, impacting greatly the semiconductor manufacturing technology in future.
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