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ディープサブミクロン配線のタイミング特性の研究

Research Project

Project/Area Number 10555118
Research Category

Grant-in-Aid for Scientific Research (B).

Allocation TypeSingle-year Grants
Section展開研究
Research Field 電子デバイス・機器工学
Research InstitutionUniversity of Tokyo

Principal Investigator

SAKURAI Takayasu  Center of Collaborative Research, University of Tokyo, 国際・産学共同研究センター, 教授 (90282590)

Co-Investigator(Kenkyū-buntansha) HIRAMOTO Toshirou  VLSI Design and Education Center, University of Tokyo, 大規模集積システム設計教育研究センター, 助教授 (20192718)
Project Period (FY) 1998 – 2000
Project Status Completed (Fiscal Year 2000)
Budget Amount *help
¥12,600,000 (Direct Cost: ¥12,600,000)
Fiscal Year 2000: ¥3,100,000 (Direct Cost: ¥3,100,000)
Fiscal Year 1999: ¥5,600,000 (Direct Cost: ¥5,600,000)
Fiscal Year 1998: ¥3,900,000 (Direct Cost: ¥3,900,000)
KeywordsLSI / Scaling / Wiring Delay / Repeater / Simulated Diffusion / Super Connect / simulated diffusion
Research Abstract

Recently interconnect was minute as scaling of transistor in LSI, interconnects parasitic resistance and capacitance will be one of the biggest source of wiring delay. Scaling law decreases gate delay, but to decrease total delay of circuit is difficult because of increment of interconnect delay.
Repeater insertion is one of the important technique of decrease interconnect delay. The method divide long interconnect by inserting repeaters. In this study, we construct new model for delay time calculation. This study suggested new method for repeater insertion that optimum delay time of interconnects with branch. Power consumption, Power-Delay product and repeater size and number for optimum design was showed, and the relation between power consumption and delay time was considered. Repeater intervals are settled uniquely according to technology node and interconnect length. Because shape and spacing of interconnects are provided by technology node.
Recently, effects of inductance attract considerable attention. But practical side of effects of inductance are not investigated yet when interconnects are divided by repeaters. In this study, we try to measure waveform inside LSI that include waveform detector using sensitive comparator. The waveform will be a source of inductance extraction.
We proposed concept of Super Connect to unite that mentioned above. Super connect means interconnect that have about 10 μm length. Conservative scaling concept cannot keep increment of power consumption and wiring delay. This concept suggest enlarge interconnects as technology nodes advances. Consequently, interconnects resistance, power consumption, interconnect layer and wiring delay will decrease.

Report

(4 results)
  • 2000 Annual Research Report   Final Research Report Summary
  • 1999 Annual Research Report
  • 1998 Annual Research Report
  • Research Products

    (32 results)

All Other

All Publications (32 results)

  • [Publications] Takayasu Sakurai: "Low Voltage, High-Speed VLSI Design"International Conference on Solid State Devices and Materials. 9. 3-30 (1999)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] Takayasu Sakurai: "LSIs in the Year 2010 and Beyond-From a Designer's Point of View-"JSAP international. 1. 15-21 (2001)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] Takayasu Sakurai: "Interconnection from Design Perspective"ADMETA 2000 : Asian Session. III-5. (2000)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] 井高康人,桜井貴康: "ディープサブミクロン配線のリピータ挿入最適化"電子情報通信学会ソサイエティ大会. C-12-2. (1998)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] 井高康人,桜井貴康: "配線遅延近似精度のモーメントマッチング次数依存性"第59回応用物理学会学術講演会. 15p-P9. 781 (1998)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] 桜井貴康: "巨大配線でLSIの限界を打破"日径マイクロデバイス. 6. 72-75 (2000)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] 桜井貴康: "システムLSI-アプリケーションと技術"サイエンスフォーラム. 1-427 (1999)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] T.Sakurai: "Low Voltage, High-Speed VLSI Design"International Conference on Solid State Devices and Materials. 3-30 (1999)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] Takayasu Sakurai: "VLSIs in the Year 2010 and Beyond -From a Designer's Point of View-"JSAP international. 15-21 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] Takayasu Sakurai: "Interconnection from Design Perspective"ADMETA 2000 : Asian Session. III-5. 19-20 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] Yasuhito Itaka and Takayasu Sakurai: "Optimum Repeater Insertion for Deep Submicron Interconnect"Society Conference of IEICE. C-12-2 (1998)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] Yasuhito Itaka and Takayasu Sakurai: "Dependency of Interconnect Delay Accuracy on the Order of Moment Matching"The Japan Society of Applied Physics, 5p-P9-/II pp. 781, The 59th Autumn Meeting. (1998)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] Takayasu Sakurai: "Huge interconnection break down limit's of LSI"Nikkei Micro Device. No.180. 72-75 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] Takayasu Sakurai: "System LSI - Application and Technique -"Science forum. 427 (1999)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] Takayasu Sakurai: "VLSIs in the Year 2010 and Beyond - From a Designer's Point of View-"JSAP international. 3. 15-21 (2001)

    • Related Report
      2000 Annual Research Report
  • [Publications] Takayasu Sakurai: "Interconnection from Design Perspective"ADMETA 2000 : Asian Session. III-5. 15-16 (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] Kouichi Nose,: "VTH-Hopping Scheme for 82% Power Saving in Low - Voltage Processors"CICC 2001 (発表予定). (2001)

    • Related Report
      2000 Annual Research Report
  • [Publications] 桜井貴康: "GSI配線の設計課題と解決策の模索"電子情報通信学会2000年ソサイエティ大会,PC-2-1. (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] 桜井貴康: "スーパーコネクト技術とグローバルインテグレーション"応用物理学会分科会シリコンテクノロジー. 23. 70-75 (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] 桜井貴康: "巨大配線でLSIの限界を打破"日経マイクロデバイス6月1日号. 180. 72-75 (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] K.Nose and T.Sakurai: "Micro IDDQ Test using Lorentz Force MOSFET's"Symp.on VLSI Circuits. June. 169-170 (1999)

    • Related Report
      1999 Annual Research Report
  • [Publications] K.Kanda,K.Nose,H.Kawaguchi: "Design Impact of Positive Temperature Dependence of Drain Current in Sub ***"Custom Integrated Circuit Conference. May. 563-566 (1999)

    • Related Report
      1999 Annual Research Report
  • [Publications] T.Sakurai: "Custom Circuit Techniques for High Performance And Low-Power ***"Custom Integrated Circuit Conference. May. 277-277 (1999)

    • Related Report
      1999 Annual Research Report
  • [Publications] T.Sakurai: "Hardware is King,Software is Queen : Has Hardware Become a Second-Class ***?"IEEE International Solid-State Circuits Conference. Feb. 294-295 (1999)

    • Related Report
      1999 Annual Research Report
  • [Publications] T.Sakurai: "Low Voltage,High-Speed VLSI Design"International Conference on Solid State Devices and Materials. Sep. 3-30 (1999)

    • Related Report
      1999 Annual Research Report
  • [Publications] Seongsoo Lee and T.Sakurai: "Run-time Power Control Scheme Using Software Feedback Loop for Low-Power ・・・・・"ASPDAC'00. A5.2. 381-386 (2000)

    • Related Report
      1999 Annual Research Report
  • [Publications] 桜井貴康: "システムLSI-アプリケーションと技術"サイエンスフォーラム. 427 (1999)

    • Related Report
      1999 Annual Research Report
  • [Publications] 井高 康仁,桜井 貴康: "配線遅延近似精度のモーメントマッチング次数依存性" 第59回応用物理学会学術講演会. 15p-P9. 781-781 (1998)

    • Related Report
      1998 Annual Research Report
  • [Publications] 井高 康仁,桜井 貴康: "ディープサブミクロン配線のリピータ挿入最適化" 電子情報通信学会ソサイエティ大会. C-12-2. 93-93 (1998)

    • Related Report
      1998 Annual Research Report
  • [Publications] K.Nose and T.Sakurai: "Closed-Form Expressions for Short-Circuit Power of Short-Channel CMOS Gates and Its Scaling Characteristics" International Technical Conference on Circuit/Systems,Comouters and Communication. 1741-1744 (1998)

    • Related Report
      1998 Annual Research Report
  • [Publications] K.Nose and T.Sakurai: "Integrated Current Sensing Device for Micro IDDQ Test" The Seventh Asian Test Symposium. 323-326 (1998)

    • Related Report
      1998 Annual Research Report
  • [Publications] グェン・ドュック・ミン,能瀬 浩一,桜井 貴康: "低電源電圧depletion型CMOSの最低動作閾値電圧" 電子情報通信学会総合大会. (発表予定). (1999)

    • Related Report
      1998 Annual Research Report

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Published: 1998-04-01   Modified: 2016-04-21  

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