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Architecture synthesis for application specified parallel computers

Research Project

Project/Area Number 10680331
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeSingle-year Grants
Section一般
Research Field 計算機科学
Research InstitutionUniversity of Tsukuba

Principal Investigator

SHIRAKAWA Tomonori  Institute of Engineering Mechanics and Systems, University of Tsukuba Professor, 機能工学系, 教授 (20112021)

Co-Investigator(Kenkyū-buntansha) YAMASHITA Yoshiyuki  Institute of Engineering Mechanics and Systems, University of Tsukuba Associate Professor, 機能工学系, 助教授 (20220353)
Project Period (FY) 1998 – 1999
Project Status Completed (Fiscal Year 1999)
Budget Amount *help
¥3,200,000 (Direct Cost: ¥3,200,000)
Fiscal Year 1999: ¥1,500,000 (Direct Cost: ¥1,500,000)
Fiscal Year 1998: ¥1,700,000 (Direct Cost: ¥1,700,000)
KeywordsParallel processing / Multiprocessor / Network / Reconfigurable structure / Soft-Hard co-generation / 並列計算機 / 専用並列計算機 / 自動合成 / 並列化コンパイラ / 自動並列化 / 最適接続 / プロセッサ間通信
Research Abstract

A method is studied for composing the connection topology of statically reconfigurable inter-processor networks by analyzing application programs. An algorithm to generate networks and parallel programs for a PE (Processing Element) model is presented. This algorithm is realized as a network generation system.
The network generation system developed by this research receives an application program written in C language, a number of PE, and a number of connection ports a PE. The received application program is divided into operations and the operations are assigned to PEs and scheduled. Inter-PE communication links are generated based on the amount of data exchange and execution time. Scheduling process in repeated twice to refine the generated network and task assignment. Finally, the system produces an inter-PE link information and a paralleled program to be executed on the parallel computer with the generated inter-PE link.
By the network generation system, networks and paralleled programs are generated with some sample programs. These networks and programs are evaluated on a parallel computer simulator.
As a result, the Poisson solver with SOR scheme runs faster on the generated network than conventional regular networks such as the nearest neighbor connection. Another result for the FFT program shows similar benefits using the generation system. These experiments also show the system derived here is more efficient for the case of a paralleled program with unbalance structure.

Report

(3 results)
  • 1999 Annual Research Report   Final Research Report Summary
  • 1998 Annual Research Report
  • Research Products

    (3 results)

All Other

All Publications (3 results)

  • [Publications] Kenji Sayano,Tomonori Shirakawa: "A Paralleling Compiler Using the Assign-and-Estimate Scheduling Algorithm"System and Computers in Japan. 29. 20-30 (1998)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      1999 Final Research Report Summary
  • [Publications] Kenji Sayano, Tomonori Shirakawa: "A Paralleling Compiler Using the Assign-and-Estimate Scheduling Algorithm"System and Computers in Japan. 29. 20-30 (1998)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      1999 Final Research Report Summary
  • [Publications] Kenji Sayano, Tomonori Shirakawa: "A Paralleling Compiler Using the Assign-and-Estimate Scheduling Algorithm"Systems and Computers in Japan. 21・11. 20-30 (1998)

    • Related Report
      1999 Annual Research Report

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Published: 1998-04-01   Modified: 2016-04-21  

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