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A study on high-speed A/D converters for vision system LSIs

Research Project

Project/Area Number 11450141
Research Category

Grant-in-Aid for Scientific Research (B).

Allocation TypeSingle-year Grants
Section一般
Research Field 電子デバイス・機器工学
Research InstitutionShizuoka University

Principal Investigator

KAWAHITO Shoji  Research Institute of Electronics, Shizuoka University, Professor, 電子工学研究所, 教授 (40204763)

Project Period (FY) 1999 – 2000
Project Status Completed (Fiscal Year 2000)
Budget Amount *help
¥8,100,000 (Direct Cost: ¥8,100,000)
Fiscal Year 2000: ¥3,500,000 (Direct Cost: ¥3,500,000)
Fiscal Year 1999: ¥4,600,000 (Direct Cost: ¥4,600,000)
KeywordsA / D converter / Vision system LSI / Moving picture correlation / Image sensor / Pipeline processing
Research Abstract

Vision chips that integrate parallel image processing engines are essential devices for the applications of robotics, FA, ITS and so on. The bottle neck in such applications lies in the analog-to-digital conversion to transfer the data from image acquisition device to the processor. In the conventional method of A/D converters integrated on image sensors, the A/D converter has to be implemented in a small size, and hence the relatively slow speed A/D converters are used. This restricts the total frame rate of the image acquisition. The head investigator of this project has developed a method to implement a high-speed A/D converter in a reduced area by using correlation properties of moving pictures. The number of comparators is reduced to be 1/4 and 1/6 for 8 bit and 10 bit cases, respectively. As the basic topology for the A/D converter array for high-speed image sensors, we propose a pipeline A/D conversion technique, and a synchronized read out method of signals from the sensor array with 100% efficiency. A 10bit 20Msamples/s A/D converter has been implemented using 0.6μm CMOS technology. The non-linearity error was less than 0.6LSB.The 8bit 10 M samples/s version using simple cascode amplifiers to integrate it on high-speed image sensors is designed and in under fabrication. The 128-channel A/D converter array can be integrated on a CMOS image sensor with 512 x 512 pixels and the resulting area of A/D converter array is estimated to be 6.9 x 1.5 mm^2. The estimated frame speed is 10000frames/s. The use of electronic shutter function and the implementation of the high-speed image sensor integrating the A/D converter array are left as near future subject.

Report

(3 results)
  • 2000 Annual Research Report   Final Research Report Summary
  • 1999 Annual Research Report
  • Research Products

    (19 results)

All Other

All Publications (19 results)

  • [Publications] ドゥイハンドコ,川人祥二: "高速非破壊中間撮像のための低消費電力A/D変換法"映像情報メディア学会誌. 54・2. 290-293 (2000)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] 宮埼大輔,川人祥二: "高速A/D変換器の消費電力・実装面積最小化設計手法"電子情報通信学会総合大会予稿集. 133 (2000)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] 枝元正和,榊原雅樹,川人祥二: "超高速ディジタルCMOSイメージセンサの一構成の提案"映像情報メディア学会年次大会講演予稿集. 159-160 (2000)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] D.Miyazaki,S.Kawahito: "Low-power area-efficient design of parallel pipeline A/D converters"Ext.Abst.,Int.Conf.Solid-State Derices and Materials. 382-383 (2000)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] D.Miyazaki,S.Kawahito: "Low-power area efficient design of embeded high-speed A/D converters"IEICE Trans.Electronics. E83C・11. 1724-1732 (2000)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] D.Handoko, S.Kawahito: "A low-power A/D conversion technique for high-speed intermediate non-destructive imaging"J.Ins.Image Information and TV Eng., Japan. vol.52, no.2. 290-293 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] D.Miyazaki, S.Kawahito: "A low-power areaefficient design method of high-speed A/D converters"Proc.IEICE General Meeting. 133 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] M.Edamoto, M.Sakakibara, S.Kawahito: "A proposal of an ultra-high-speed digital CMOS image sensor"Proc.2000 ITE Annual Convention. 159-160 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] D.Miyazaki, S.Kawahito: "Low-power areaefficient design of parallel pipeline A/D converters"Ext.Abst., Int.Conf.Solid-State Devices and Materials. No.E83C-11. 382-383 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] D.Miyazaki, S.Kawahito: "Low-power areaefficient design of embedded high-speed A/D converters"IEICE Trans.Electronics. vol.E83C, no.11. 1723-1732 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2000 Final Research Report Summary
  • [Publications] ドゥイハンドコ,川人祥二: "高速非破壊中間撮像のための低消費電力A/D変換法"映像情報メディア学会誌. 54・2. 290-293 (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] 宮崎大輔,川人祥二: "高速A/D変換器の消費電力・実装面積最小化設計手法"電子情報通信学会総合大会予稿集. 133 (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] 枝元正和,榊原雅樹,川人祥二: "超高速ディジタルCMOSイメージセンサの一構成の提案"映像情報メディア学会年次大会講演予稿集. 159-160 (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] D.Miyazaki,S.Kawahito: "Low-power area-efficient design of paraller pipeline A/D converters"Ext.Abst.,Int.conf.Solid-State Devices and Materials. 382-383 (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] D.Miyazaki,S.Kawahito: "Low-power area efficient design of embeded high-speed A/D converters"IEICE Trans.Electronics. E83C・11. 1724-1732 (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] D.Miyazaki,S.Kawahito,Y.Tadokoro: "Low-power Area-Efficient Pipelined A/D Converter Design Using Single-Ended Amplifier"IEICE Trans.Fundamentals. E82-A,2. 293-300 (1999)

    • Related Report
      1999 Annual Research Report
  • [Publications] S.Kawahito,J.Naka,Y.Tadokoro: "A Low-Power A/D Conversion Technique Using Correlation of Moving Pictures"IEICE Trans.Electronics. E82-C.9. 1764-1771 (1999)

    • Related Report
      1999 Annual Research Report
  • [Publications] 川人祥二,宮崎大輔,田所嘉昭: "超高速撮像用画素レベルA/D変換方式の検討"映像情報メディア学会技術報告. IPU99-34. 65-70 (1999)

    • Related Report
      1999 Annual Research Report
  • [Publications] ドゥイハンドコ,川人祥二: "高速非破壊中間撮像のための低消費電力A/D変換法"映像情報メディア学会誌. 54・2. 290-293 (2000)

    • Related Report
      1999 Annual Research Report

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Published: 1999-04-01   Modified: 2016-04-21  

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