| Project/Area Number |
11450142
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
電子デバイス・機器工学
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| Research Institution | Shimane University |
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Principal Investigator |
TSUCHIYA Toshiaki Shimane Univ., Interdisciplinary Faculty of Science and Engineering, Professor, 総合理工学部, 教授 (20304248)
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| Co-Investigator(Kenkyū-buntansha) |
MATSUURA Takashi Research Institute of Electrical Communication, Tohoku Univ., Associate Professor, 電気通信研究所, 助教授 (60181690)
MUROTA Junichi Research Institute of Electrical Communication, Tohoku Univ., Professor, 電気通信研究所, 教授 (70182144)
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| Project Period (FY) |
1999 – 2001
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| Project Status |
Completed (Fiscal Year 2001)
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| Budget Amount *help |
¥14,500,000 (Direct Cost: ¥14,500,000)
Fiscal Year 2001: ¥1,700,000 (Direct Cost: ¥1,700,000)
Fiscal Year 2000: ¥1,200,000 (Direct Cost: ¥1,200,000)
Fiscal Year 1999: ¥11,600,000 (Direct Cost: ¥11,600,000)
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| Keywords | SiGe / SOI / CMOS / hetero-structure / low power / high speed / low-frequency noise / hot carrier / ヘテロ界面準位 / チャージポンピング法 / 極浅ソース・ドレイン |
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| Research Abstract |
In this study, in order to realize future low-power and high-speed CMOS devices, we have tried to apply SiGe material and SOI (Silicon-on-Insulator) structure to Si CMOS, and have investigated the device performance, analyzed the characteristics, and developed new evaluation methods of the devices.
(1) It was confirmed that strained SiGe-channel pMOSFETs show twice higher transconductance compared with conventional counterparts.
(2) It was shown that drain leakage current in the SiGe-channel pMOSFETs increases with the increase in the SiGe thickness over a critical value. The mechanism of the leakage current was clarified, and guidelines for the Ge fraction and the SiGe thickness were obtained.
(3) 0.1-micron-gate pMOSFETs with raised source/drain structures and extremely-shallow source/drain junctions were fabricated using low-temperature doped-SiGe selective-epitaxial growth, and it was verified that the technique is effective to suppress short channel effects, and to obtain excellent drain drivability due to the low-resistance shallow source/drain structure.
(4) It was clarified that low-frequency noise in the SiGe-channel pMOSFETs, which is an important factor for their analogue applications, can be lower than that in conventional Si pMOSFETs.
(5) Hot-carrier-induced instability in Lorentzian-like excess low-frequency noise in floating-body SOI MOSFETs was found for the first time, and its mechanism was clarified.
(6) An experimental method to directly measure the interface-trap-density in the SiGe/Si heterostructure, which is introduced to the channel region in the SiGe-channel MOSFETs, was established by using the charge pumping technique. The method is effective to investigate the relationship between the device characteristics and the electrical quality of the heterostructure interface.
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