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Study on speculative parallel architecture using runtime program restructuring

Research Project

Project/Area Number 11480063
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypeSingle-year Grants
Section一般
Research Field 計算機科学
Research InstitutionThe University of Tokyo

Principal Investigator

HIRAKI Kei  The University of Tokyo, Graduate School of Information Science and Technology, Professor, 大学院・情報理工学系研究科, 教授 (20238348)

Project Period (FY) 1999 – 2001
Project Status Completed (Fiscal Year 2001)
Budget Amount *help
¥14,900,000 (Direct Cost: ¥14,900,000)
Fiscal Year 2001: ¥4,600,000 (Direct Cost: ¥4,600,000)
Fiscal Year 2000: ¥4,100,000 (Direct Cost: ¥4,100,000)
Fiscal Year 1999: ¥6,200,000 (Direct Cost: ¥6,200,000)
KeywordsSpeculative execution / automatic parallelization / program restructuring / Binary translation / thread-level parallel execution / speculative memory / simulation / SPMD / マルチスレッド / 再利用 / 重複実行 / 投機的メモリ / バイナリトランスレーション / 命令レベル並列性 / 実行時プログラム再構成 / SMT / スレッドレベル並列性 / 並列処理 / オンチップマルチプロセッサ
Research Abstract

The speculative parallel architecture utilizing on-chip resources is proposed. The proposed architecture, Runtime Restructuring extracts parallelism dynamically at runtime from a sequential binary program. In order to reduce overheads associated with frequent fork/join and frequent register-to- register communication in existing thread-level speculative architecture, Runtime Restructuring modifies a sequential binary program to a speculative SPMD program with duplicated execution.
Since generation of control flow is influenced by the history of past execution, its parallelization is necessary to achieve the accurate execution status. Then we introduce a binary translation method to reduce overheads for analyzing parallel constructs and register dependency. We show the details of the parallel formation of control flow, and the evaluation results on SPEC benchmarks. Tomcatv gets 3.9 times and compress gets significant performance gain on 4CPUs. On SPEC INT benchmarks, binary translation is useful to reduce overheads in short loops.

Report

(4 results)
  • 2001 Annual Research Report   Final Research Report Summary
  • 2000 Annual Research Report
  • 1999 Annual Research Report
  • Research Products

    (20 results)

All Other

All Publications (20 results)

  • [Publications] 中村 誠, 平木 敬: "二項順序関係により投機的メモリアクセスを制御するキャッシュシステム"電子情報通信学会技術報告(デザイン・ガイア). 42-5. 22-29 (2002)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2001 Final Research Report Summary
  • [Publications] 玉造 潤史, 平木 敬: "実行時プログラム再構成チップマルチプロセッサ"情報処理学会アーキテクチャ研究会研究報告. 10-23. 7-13 (2001)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2001 Final Research Report Summary
  • [Publications] K.Hiraki et al.: "Data Reservoir : Utilization of Multi-Gigabit Backbone Network for Data-Intensive Research"Proc. SC2002. 1-10 (2002)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2001 Final Research Report Summary
  • [Publications] M. Nakamura and K. Hiraki: "A cache memory system for speculative execution that utilize binary ordering relation"Technical Report of IEICE, CPSY. 45-2. 22-29 (2002)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2001 Final Research Report Summary
  • [Publications] J. Tamatsukuri and K. Hiraki: "Architecture of chip multiprocessor with runtime program restructuring"Technical Report of IPSJ, ARC. 10-23. 7-13 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2001 Final Research Report Summary
  • [Publications] K. Hiraki et al.: "Data Reservoir : Utilization of Multi-Gigabit Backbone Network for Data-Intensive Research"Proc. SC2002, http://www.sc02.org. (2002)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2001 Final Research Report Summary
  • [Publications] 玉造潤史, 平木 敬: "実行時再構成アーキテクチャの評価"JSPP02論文集. 2002.

    • Related Report
      2001 Annual Research Report
  • [Publications] Junji Tamatsukuri, Kei Hiraki: "Control flow speculation with runtime restructuring"Proc. Int. Conf. Supercomputing. 12. (2002)

    • Related Report
      2001 Annual Research Report
  • [Publications] Niwa,J.,Matsumoto,T.,and Hiraki,K: "Comparative Study of Page-based and Segment-based Software DSM through Compiler Optimization"Proc.of the 2000 Int.Conf.on Supercomputing. (ICS'00),ACM press. 284-295 (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] 菅原豊,平木敬: "レイテンシ予測に基づいた命令フェッチ機構."電子情報通信学会技術研究報告. 100・20. 7-14 (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] 平澤将一,松本尚,平木敬: "ソフトウェア高レベルデータ値予測方式の予備評価."電子情報通信学会技術研究報告CPSY2000-51. (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] 中村誠,平木敬: "スレッドレベル投機における投機的メモリアクセス機構"電子情報通信学会技術研究報告. (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] 高木将通,平木敬: "高度パイプライン化SMTプロセッサ上のトレースに基づく複数パス実行方式"電子情報通信学会技術研究報告. (2001)

    • Related Report
      2000 Annual Research Report
  • [Publications] 丹羽純平,松本尚,平木敬: "ソフトウェアDSM機構を支援する最適化コンパイラ"情報処理学会論文誌. 42・4. (2001)

    • Related Report
      2000 Annual Research Report
  • [Publications] 田中 清史,松本 尚,平木 敬: "軽いハードウェアによる分散共有メモリ機構"情報処理学会論文誌. 40,No.5. 2025-2036 (1999)

    • Related Report
      1999 Annual Research Report
  • [Publications] Niwa,J.,Inagaki,T.,Matsumoto,T.,Hiraki,K.: "Evaluation of Compiler-Assisted Software DSM Schemes for a Workstation Cluster"Workshop on Innovative Architecture for Future Generation High Performance Processors and Systems. (1999)

    • Related Report
      1999 Annual Research Report
  • [Publications] Niwa,J.,Matsumoto,T.,Hiraki,K.: "Comparative study of page-pased and segment-based software DSM Through compiler optimization"Conf.Supercomputing IEEE and ACM. (2000)

    • Related Report
      1999 Annual Research Report
  • [Publications] Sasaki,S.,Matsumoto,T.,Hiraki,K.: "On the Schedulability Conditions on Partial Time Slots"Proceedings of 6th International Conference on Real-Time Computing Systems and Applications. 166-173 (1999)

    • Related Report
      1999 Annual Research Report
  • [Publications] 高木 将通,松本 尚,平木 敬: "ソフトウェアシミュレータ上でのSPLASH-2ベンチマークの挙動に関する研究"情報処理学会研究報告 ARCH134-6. 99,No.67. 31-36 (1999)

    • Related Report
      1999 Annual Research Report
  • [Publications] 新野 竜太,松本 尚,平木 敬: "拘束シリアルリンク結合に基づくアーキテクチャのボードレベルシミュレーション"情報処理学会研究報告 ARCH135-9. 99,No.100. 57-62 (1999)

    • Related Report
      1999 Annual Research Report

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Published: 1999-04-01   Modified: 2016-04-21  

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