Co-Investigator(Kenkyū-buntansha) |
SAKURABA Masao TOHOKU UNIVERSITY, RESEARCH INSTITUTE OF ELECTRICAL COMMUNICATION, RESEARCH ASSOCIATE, 電気通信研究所, 助手 (30271993)
MATSUURA Takashi TOHOKU UNIVERSITY, RESEARCH INSTITUTE OF ELECTRICAL COMMUNICATION, ASSOCIATE PROFESSOR, 電気通信研究所, 助教授 (60181690)
山本 裕司 日本学術振興会, 日本学術振興会・特別研究員
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Budget Amount *help |
¥7,600,000 (Direct Cost: ¥7,600,000)
Fiscal Year 2001: ¥2,400,000 (Direct Cost: ¥2,400,000)
Fiscal Year 2000: ¥2,400,000 (Direct Cost: ¥2,400,000)
Fiscal Year 1999: ¥2,800,000 (Direct Cost: ¥2,800,000)
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Research Abstract |
In this scientific research, in order to realize the high speed and large capacitance mobile communication system with low working voltage and low power consumption, a new mobile communication System-On-Chip which is mainly integrated by SiGe-based MOS and HBT have been developed under the 3-year-plan from 1999 with the co-work of the Innovation for High Performance Microelectronics (IHP), Germany. In the last year of the 3 years, the study on the ultra-small structure formation of SiGe and the ultra-high speed mobile-communication device fabrication was conducted. The study on the ultra-small SiGe structure formation includes the realization of the exact control of impurity-doped SiGe(C) thin film deposition, of the exact anisotropy etching control of ultra-small structure SiGe(C)-based semiconductor, of the integration of the adsorption/reaction constant for source gas molecules in CVD process, of the database development of the atomic layer growth and the atomic layer plasma process
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, of the heavily P-doped semiconductor, and of atomic order nitridation and atomic order nitrogen doping control. Moreover, the study on the ultra-high speed device fabrication includes the development and the investigation of highly controllable process technology, of ultra-large scale integrated circuit fabrication process, of the ultra-high speed device structure, and the evaluation of the fabricated devices. From these studies, especially, the CMOS applicability of 0.1-μm MOSFETs with super self-aligned ultra-shallow junction formed by selective B-doped SiGe epitaxy, the excellent low frequency noise characteristics of SiGe-channel pMOSFET, the device fabrication process and the structure of 100GHz-HBT, the metallization technology with ultra-low contact resistance, and the exact control of B- or P-doped SiGe(C) epitaxial growth have been reported. Furthermore, highly exact evaluation process of the ultra-small SiGe(C) structure, which is extremely important to device application, was developed. Less
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