| Project/Area Number |
12044211
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| Research Category |
Grant-in-Aid for Scientific Research on Priority Areas
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| Allocation Type | Single-year Grants |
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| Review Section |
Science and Engineering
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| Research Institution | Hiroshima University |
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Principal Investigator |
IWATA Atsushi Hiroshima University, Advanced Sciences of Mater, Professor, 先端物質科学研究科, 教授 (30263734)
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| Co-Investigator(Kenkyū-buntansha) |
MORIE Takashi Kyusyu Institute of Technology, Dept of Brain Science and Systems Engineering, Professor, 大学院・生命体工学研究科, 教授 (20294530)
永田 真 広島大学, 大学院・先端物質科学研究科, 助手 (40274138)
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| Project Period (FY) |
2000 – 2002
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| Project Status |
Completed (Fiscal Year 2003)
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| Budget Amount *help |
¥62,000,000 (Direct Cost: ¥62,000,000)
Fiscal Year 2002: ¥21,100,000 (Direct Cost: ¥21,100,000)
Fiscal Year 2001: ¥20,900,000 (Direct Cost: ¥20,900,000)
Fiscal Year 2000: ¥20,000,000 (Direct Cost: ¥20,000,000)
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| Keywords | pulse modulation / merged AD circuit architecture / resistive-fuse network / cellular automaton / Gabor filter / coarse region segmentation / extraction / face / object recognition / FPGA implementation / 領域分割 / 特徴抽出 / ガボールウェーブレット変換 / 画素並列 / アナログ・デジタル融合LSI / 領域抽出 / 抵抗ヒューズ / アナログ・デジタル融合回路 |
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| Research Abstract |
The aim of this research is to develop integrated systems for face/object recognition from natural scene images. The systems execute image feature extraction with real time by pixel-parallel operation based on the merged AD circuit architecture using pulse-modulation signals. As algorithms and architectures for recognition processing, we have developed coarse region segmentation by resistive-fuse networks, region extraction by cellular automaton processing and feature extraction by Gabor wavelet transformation.
We have verified the flexible segmentation ability of the method using resistive-fuse networks, and have design, fabricated and verified a VLSI chip of the network. We have also developed efficient FPGA implementation of the resistive-fuse networks, in which the processing time is about 20 ms for 64×64-pixel images. As for region extraction, FPGA implementation of the cellular automaton has achieved processing time of 5 micro seconds for 30×30-pixel images including about 5 regions, which is several tens times faster than the conventional serial labeling processing. We have also proposed a resistive network circuit for Gabor filtering, and designed a 2-D Gabor filtering LSI of 4.9 mm sq. with 12×24 pixels using a 0.35 micron CMOS process. A 2-D impulse response has been obtained by the measurement of the fabricated LSI chip. We have also designed a 2-D Gabor filtering LSI of 9.8 mm sq. with 6l×72 pixels in which operation time of 40 ms and power consumption of 800 mW have been obtained.
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