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Wafer-Scale Dynamic Neural-Network-System with Optical Waveguide

Research Project

Project/Area Number 12305024
Research Category

Grant-in-Aid for Scientific Research (A)

Allocation TypeSingle-year Grants
Section一般
Research Field 電子デバイス・機器工学
Research InstitutionTohoku University

Principal Investigator

KOYANAGI Mitsumasa  Tohoku University, Graduate School of Engineering, Professor, 大学院・工学研究科, 教授 (60205531)

Co-Investigator(Kenkyū-buntansha) KURINO Hiroyuki  Tohoku University, Graduate School of Engineering, Assistant Professor, 大学院・工学研究科, 助教授 (70282093)
HANE Kazuhiro  Tohoku University, Graduate School of Engineering, Professor, 大学院・工学研究科, 教授 (50164893)
ESASHI Masayoshi  Tohoku University, New Industry Creation Hatchery Center, Professor, 未来科学技術共同研究センター, 教授 (20108468)
朴 起台  東北大学, 大学院・工学研究科, 助手 (50312608)
Project Period (FY) 2000 – 2002
Project Status Completed (Fiscal Year 2002)
Budget Amount *help
¥44,190,000 (Direct Cost: ¥38,700,000、Indirect Cost: ¥5,490,000)
Fiscal Year 2002: ¥7,150,000 (Direct Cost: ¥5,500,000、Indirect Cost: ¥1,650,000)
Fiscal Year 2001: ¥16,640,000 (Direct Cost: ¥12,800,000、Indirect Cost: ¥3,840,000)
Fiscal Year 2000: ¥20,400,000 (Direct Cost: ¥20,400,000)
KeywordsOptical Waveguide / Parallel Processing / Wafer Level Integration / System on Chip / Wafer Bonding Technology / Micro-Bump / Semiconductor Technology / Large Scale Integration Technology / ウエーハレベルインテグレーション / ウエーハ張り合わせ技術 / システムオンチップ
Research Abstract

We proposed a new dynamic neural network system with optical wave guides. Living nerves have several thousand connections, namely synapses. These connections play an important role in living information processing system and provide recognition and association for human. The optical wave guide can simultaneously sum up many input signals like synapses. This study aimed in study the possibility of such optical neural network system with optical wave guides and to fabricate the test chips and test modules for the system. We adopted the learning algorithm using simultaneous perturbation for the dynamic neural network system with optical wave guides. We can simultaneously update the weights of synapses by the same increment in the learning algorithm using simultaneous perturbation. Therefore, the learning algorithm using simultaneous perturbation is very suitable for the dynamic neural network system with optical wave guides. We proposed new synapse circuit and learning circuit for this system. We also proposed a dynamic neural network system with three-dimensionally stacked structure. The re configurable circuits are used in this system in addition to the optical waveguides for synaptic connection. In order in fabricate the test chips and teat modules for this system, basic technologies such as the optical interconnection technology using waveguides and the three-dimensional integration technology using re-configurable circuits were developed.

Report

(4 results)
  • 2002 Annual Research Report   Final Research Report Summary
  • 2001 Annual Research Report
  • 2000 Annual Research Report
  • Research Products

    (29 results)

All Other

All Publications (29 results)

  • [Publications] 中村共則, 橋本啓, 沈正七, 栗野浩之, 小柳光正: "三次元集積回路を実装した光MCM技術の研究"電子情報通信学会 信学技報. 2002-08. 55-60 (2002)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2002 Final Research Report Summary
  • [Publications] 小柳光正, 栗野浩之: "VLSIの光インターコネクション"応用物理学会 関西セミナー SFM講演会予稿集. (2002)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2002 Final Research Report Summary
  • [Publications] Toru Hashimoto, Ki Tae Park, Hiroyuki Kurino, Mitsumasa Koyanagi: "Optical Data Transfer in Multichip Module with Optical Interconnection"Ext. Abst. of the 2001 Int. Conf. on Solid State Devices and Materials. 594-595 (2001)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2002 Final Research Report Summary
  • [Publications] T.Morooka, T.Nakamura, H.Kurino, M.Koyanagi, et al.: "Three-Dimensional Integration of Fully Depleted SOI Devices"Ext. Abst. of the 2001 Int. Conf. on Solid State Devices and Materials. 38-39 (2001)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2002 Final Research Report Summary
  • [Publications] M.Koyanagi, Y.Nakagawa, T.Nakamura, H.Kurino, et al.: "Neuromorphic Vision Chip Fabricated Using Three-Dimensional Integration Technology"International Solid State Circuits Conference 2001. 270-271 (2001)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2002 Final Research Report Summary
  • [Publications] H.Kurino, Y.Nakagawa, K.W.Lee, K.T.Park, M.Koyanagi, et al.: "Smart Vision Chip Fabricated Using Three Dimensional Integration Technology"Neural Information Processing Systems 2000. 66-66 (2000)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2002 Final Research Report Summary
  • [Publications] Tomonori NAKAMURA, Toru HASHIMOTO, Mitsumasa KOYANAGI, et al.: "Optical MCM technology for 3D LSI"Technical Report of IEICE. 2002-08. 55-60 (2002)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2002 Final Research Report Summary
  • [Publications] Hiroyuki Kurino, Mitsumasa Koyanagi: "VLSI Optical Interconnection"The Japan Applied Physics SFM Seminar. (2002)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2002 Final Research Report Summary
  • [Publications] Toru Hashimoto, Ki Tae Park, Hiroyuki Kurino, Mitsumasa Koyanagi: "Optical Data Transfer in Multichip Module with Optical Interconnection"Ext. Abst. of the 2001 Int. Conf. on Solid State Devices and Materials. 594-595 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2002 Final Research Report Summary
  • [Publications] Tetsu Morooka, Tomonori Nakamura, Hiroyuki Kurino, Mitsumasa Koyanagi, et al: "Three-Dimensional Integration of Fully Developed SOI Devices"Ext. Abst. of the 2001 Int. Conf. on Solid State Devices and Materials. 38-39 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2002 Final Research Report Summary
  • [Publications] M. Koyanagi, Y. Nakagawa, T. Nakamura, H. Kurino, et al.: "Neuromorphic Vision Chip Fabricated Using Three-Dimensional"International Solid State Circuits Conference 2001. 270-271 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2002 Final Research Report Summary
  • [Publications] H. Kurino, Y. Nakagawa, K. W. Lee, K. T. Park, M. Koyanagi, et al.: "Smart Vision Chip Fabricated Using Three Dimensional Integration Technology"Neural Information Processing Systems. 66 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2002 Final Research Report Summary
  • [Publications] 中村共則, 橋本啓, 沈正七, 栗野浩之, 小柳光正: "三次元集積回路を実装した光MCM技術の研究"電子情報通信学会 信学技報. 2002-08. 55-60 (2002)

    • Related Report
      2002 Annual Research Report
  • [Publications] 小柳光正, 栗野浩之: "VLSIの光インターコネクション"応用物理学会 関西セミナー SFM講演会予稿集. 55-55 (2002)

    • Related Report
      2002 Annual Research Report
  • [Publications] Hoon Choi, Hiroyuki Kurino, Mitsumasa Koyanagi, et al.: "SOI NMOSFETs with SiGe Elevated S/D and Ni Silicide"Extended Abstracts of International Workshop on Junction Technology 2002. 63-64 (2002)

    • Related Report
      2002 Annual Research Report
  • [Publications] Hoon Choi, Hyuckjae Oh, Hiroyuki Kurino, Mitsumasa Koyanagi, et al.: "SiGe Selective Epitaxial Growth on SOI Substrate for The Elevated Source and Drain Structure"Abstracts of International Semiconductor Technology Conference (ISTC). 55-55 (2002)

    • Related Report
      2002 Annual Research Report
  • [Publications] Hyuckjae Oh, Hoon Choi, Hiroyuki Kurino, Mitsumasa Koyanagi, et al.: "Ultra-Shallow Junction Formed by Laser Induced Atomic Layer Doping in Silicon on Insulator"Abstracts of International Semiconductor Technology Conference (ISTC). 66-66 (2002)

    • Related Report
      2002 Annual Research Report
  • [Publications] Mitsumasa Koyanagi, Yoshihiro Nakagawa, Hiroyuki kurino, et al.: "Neuromorphic Vision Chip Fabricated Using Three-Dimensional Integration Technology"Proc. of the 2001 IEEE International Solid State Circuits Conference. 270-271 (2001)

    • Related Report
      2001 Annual Research Report
  • [Publications] Toru Hashimoto, Ki Tae Park, Hiroyuki Kurino, Mitsumasa Koyanagi: "Optical Data Transfer in Multichip Module with Optical Interconnection"Ext. Abst. of the 2001 Int. Conf. on Solid State Devices and Materials. 594-595 (2001)

    • Related Report
      2001 Annual Research Report
  • [Publications] T.Morooka, T.Nakamura, H.Kurino, M.Koyanagi, et al.: "Three-Dimensional Integration of Fully Depleted SOI Devices"Ext. Abst. of the 2001 Int. Conf. on Solid State Devices and Materials. 38-39 (2001)

    • Related Report
      2001 Annual Research Report
  • [Publications] K-T.Park, T.Nakamura, K-W.Lee, H.Kurino, M.Koyanagi, et al.: "A WAFER-LEVEL THREE DIMENSIONAL CHIP STACKING TECHNOLOGY FOR HIGH-PERFORMANCE MICROELECTRONICS AND MEMS"Proc. of IPACK'01 The Pacific Rim/ASME Int. Electronic Packaging Technical Conference and Exhibition. (2001)

    • Related Report
      2001 Annual Research Report
  • [Publications] 栗野浩之, 中川源洋, 李康旭, 中村共則, 小柳光正 et al.: "三次元集積化技術を使ったビジョンチップ"社団法人 電子情報通信学会 信学技報. 101(85). 29-35 (2001)

    • Related Report
      2001 Annual Research Report
  • [Publications] Hiroyuki Kurino, Yoshihiro Nakagawa, Mitsumasa Koyanagi et al.: "Biologically Inspired Vision Chip with Three Dimensional Structure"IEICE Transactions on Electronics. E84-C(12). 1712-1722 (2001)

    • Related Report
      2001 Annual Research Report
  • [Publications] T.Hashimoto K.Kasahara,K,T,Park H.Kurino and M.Koyanagi: "Shared Memory with Optical Interconnection for Parallele Processor System"SPIE2001. (2001)

    • Related Report
      2000 Annual Research Report
  • [Publications] K.W.Lee,T.Nakamura,K.Sakuma H.Kurino M.Koyanagi,and et al.: "Development of Three-Dimensional Integration Technology for Highly Parallel Image-Processing Chip"Japanese Journal of Applied Physics. 39. 2473-2477 (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] H.Kurino,Y.Nakagawa,K.W.Lee,K.T.Park,M.Koyanagi and et al.: "Smart Vision Chip Fabricated Using Three Dimensional Integration Technology"Neural Information Processing Systems 2000. (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] Y.Nakagawa,K.W.Lee,H.Kurino,M.Koyanagi and et al.: "Neuromorphic Analog Circuits for Three-Dimensional Stacked Vision Chip"Proc.of 7th International Conference on Neural Information Processing. 636-641 (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] M.Koyanagi,Y.Nakagawa,T.Nakamura,H.Kurino and et al.: "Neuromorphic Vision Chip Fabricated Using Three-Dimensional Integration Technology"International Solid State Circuits Conference 2001. 270-271 (2001)

    • Related Report
      2000 Annual Research Report
  • [Publications] 小柳光正,李康旭: "3次元集積化とグローバルインテグレーション"応用物理学会シリコンテクノロジー分科会 第23回研究会. (2000)

    • Related Report
      2000 Annual Research Report

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Published: 2000-04-01   Modified: 2016-04-21  

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