| Project/Area Number |
12450134
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
電子デバイス・機器工学
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| Research Institution | Hokkaido University |
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Principal Investigator |
AMEMIYA Yoshihito Hokkado Univ., Grad. School of Eng., Prof., 大学院・工学研究科, 教授 (80250489)
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| Co-Investigator(Kenkyū-buntansha) |
ASAI Tetsuya Hokkado Univ., Grad. School of Eng., Asso. Prof., 大学院・工学研究科, 助教授 (00312380)
YAMAMOTO Masafumi Hokkado Univ., Grad. School of Eng., Prof., 大学院・工学研究科, 教授 (10322835)
YOH Kanji Hokkado Univ., RCIQE, Prof., 量子集積エレクトロニクス研究センター, 教授 (60220539)
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| Project Period (FY) |
2000 – 2001
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| Project Status |
Completed (Fiscal Year 2001)
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| Budget Amount *help |
¥12,300,000 (Direct Cost: ¥12,300,000)
Fiscal Year 2001: ¥6,600,000 (Direct Cost: ¥6,600,000)
Fiscal Year 2000: ¥5,700,000 (Direct Cost: ¥5,700,000)
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| Keywords | quantum dot / directed-graph logic / binary decision diagram / logic circuit / integrated circuit / グラフ / 単電子 |
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| Research Abstract |
We proposed a method of constructing quantum-dot logic circuits that can be used to develop large digital systems with ultra-low power consumption. These dot circuits consist of dot arrays fabricated using a wrap-gate structure, and they perform logic operations on the basis of the binary decision diagram. Sample dot circuits such as elementary logic gates and adder subsystems were designed. The operation of the designed circuits was confirmed by computer simulation.
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