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Computer Architecture bayed on Autonomous Reconfigurable Logic Device

Research Project

Project/Area Number 12450152
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypeSingle-year Grants
Section一般
Research Field 情報通信工学
Research InstitutionKYOTO UNIVERSITY

Principal Investigator

NAKAMURA Yukihiro  Kyoto University, Department of Communications and Computer Engineering, Professor, 情報学研究科, 教授 (60283628)

Co-Investigator(Kenkyū-buntansha) IZUMI Tomonori  Kyoto University, Department of Communications and Computer Engineering, Research Associate, 情報学研究科, 助手 (30303887)
ONOYE Takao  Kyoto University, Department of Communications and Computer Engineering, Associate Professor, 情報学研究科, 助教授 (60252590)
Project Period (FY) 2000 – 2001
Project Status Completed (Fiscal Year 2001)
Budget Amount *help
¥7,500,000 (Direct Cost: ¥7,500,000)
Fiscal Year 2001: ¥2,400,000 (Direct Cost: ¥2,400,000)
Fiscal Year 2000: ¥5,100,000 (Direct Cost: ¥5,100,000)
KeywordsProgrammable Logic Device / Reconfigurable Logic / Plastic Cell Architecture / VLSI Design / VLSI Test / Computer Aided Design / リコンフィギィラルブル・ロジック / リコンフィギャラブル・ロジック / プログラマブル・ロジック / 並列計算 / 回路設計 / 論理関数表現 / 動的資源割当
Research Abstract

In this project, architecture and applications based on autonomous reconfigurable logic devices has been explored in order to facilitate reconfigurable computing systems.
Plastic Cell Architecture (PCA) is proposed as one of extensions of programmable logic devices with the unique characteristics as follows ; asynchronous cooperation of circuits referred to as objects; pipelined communication between objects ; array of homogeneous, relocatable, and expandable cells; unification of logic and memory; and dynamic reconfiguration by itself.
In order to realize above characteristics, an architecture which consists of two layers is proposed referred to as a plastic part and a built-in part. The plastic part works as a programmable logic device or a memory. The built-in part works for communications between objects, access to memories, and reconfiguration of the plastic part. PCA is expected to work faster by asynchronous pipelined communication of objects, while it is considered to be difficult to accelerate the clock cycle of a circuit implemented in conventional PLDs because of the delay of global interconnections. Furthermore, PCA is expected to be a key device for reconfigurable computing by virtue of its unique architecture and flexibility in reconfiguration.
In order to facilitate such a computing system, we have explored the followings ; (1) architectural design, physical design, and VLSI implementation of PCA device ; (2) design methodology, design language, computer aided design tools, simulators, and libraries for implementation of target functions in the PCA device ; (3) methodology to manage hardware resources for dynamic reconfiguration in PCA device ; (4) applications of PCA in the field of image codec, audio codec, and communications.

Report

(3 results)
  • 2001 Annual Research Report   Final Research Report Summary
  • 2000 Annual Research Report
  • Research Products

    (23 results)

All Other

All Publications (23 results)

  • [Publications] D.Murakami, T.Izumi, T.Onoye, Y.Nakamura: "A Hardware Algorithm of Dynamic Area Allocation to Circuits for Plastic Cell Architecture"Proc. SCS Euromedia Conference. 1. 85-89 (2000)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2001 Final Research Report Summary
  • [Publications] T.Izumi, R.Kan, Y.Nakamura: "Array-Based Mapping Algorithm of Logic Functions into Plastic Cell Architecture"IEICE Trans. Fundamentals. Vol.E83-A, No.12. 2538-2544 (2000)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2001 Final Research Report Summary
  • [Publications] K.Chikamura, T.Izumi, T.Onoye, Y.Nakamura: "IEEE1394 System Simulation Environment and a Design of its Link Layer Controller"Proc. 2001 IEEE International Symposium on Circuits and Systems. V. 1-4 (2001)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2001 Final Research Report Summary
  • [Publications] H.Tsutsui, T.Izumi, T.Onoye, Y.Nakamura, et al.: "Design of JPEG2000 Encoder for Fully Scalable Image Coding"Prof. 5th World Multi-Conference on Systemics, Cybernetics and Informatics. 1. (2001)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2001 Final Research Report Summary
  • [Publications] T.Okamoto, T.Izumi, T.Onoye, Y.Nakamura. et al.: "C-Based Design Automation Environment for Plastic Cell Architecture"Proc. 10th Workshop of Synthesis And System Integration of Mixed Technologies. 1. 45-49 (2001)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2001 Final Research Report Summary
  • [Publications] H.Tsutsui, T.Izumi, T.Onoye, Y.Nakamura, et al.: "LUT-Array-Based PLD and Synthesis Approach Based on Sum of Generalized Complex Terms Expression"IEICE Trans. Fundamentals. Vol.E84-A, No.11. 2681-2689 (2001)

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2001 Final Research Report Summary
  • [Publications] D. Murakami, T. Izumi, T. Onoye, Y. Nakamura: "A Hardware Algorithm of Dynamic Area Allocation to Circuits for Plastic Cell Architecture"Proc. SCS Euromedia Conference. 85-89 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2001 Final Research Report Summary
  • [Publications] T. Izumi, R. Kan, Y. Nakamura: "Array-Based Mapping Algorithm of Logic Functions into Plastic Cell Architecture"IEICE Trans. Fundamentals. Vol. E83A, No.12. 2538-2544 (2000)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2001 Final Research Report Summary
  • [Publications] K. Chikamura, T. Izumi, T. Onoye, Y. Nakamura, et al.: "IEEE1394 System Simulation Environment and a Design of its Link Layer Controller"Proc. 2001 IEEE International Symposium on Circuits and Systems. VI-4. (2001)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2001 Final Research Report Summary
  • [Publications] H. Tsutsui, T. Izumi, T. Onoye, Y. Nakamura, et al.: "Design of JPEG2000 Encoder for Fully Scalable Image Coding"Proc. 5th World Multi-Conference on Systemics, Cybernetics and Informatics. (2001)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2001 Final Research Report Summary
  • [Publications] T. Okamoto, T. Izumi, T. Onoye, Y. Nakamura, et al.: "C-Based Design Automation Environment for Plastic Cell Architecture"Proc. 10th Workshop ot Synthesis And System Integration of Mixed Technologies. 45-49 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2001 Final Research Report Summary
  • [Publications] H. Tsutsui, T.Izumi, T. Onoye, Y. Nakamura; et al.: "LUT-Array-Based PLD and Synthesis Approach Based on Sum of Generalized Complex Terms Expression"IEICE Trans. Fundamentals. Vol. E84A,No. 11. 2681-2689 (2001)

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2001 Final Research Report Summary
  • [Publications] D.Murakami, T.Izumi, T.Onoye, Y.Nakamura: "A Hardware Algorithm of Dynamic Area Allocation to Circuits for Plastic Cell Architecture"Proc. SCS Euromedia Conference. 1. 85-89 (2000)

    • Related Report
      2001 Annual Research Report
  • [Publications] T.Izumi, R.Kan, Y.Nakamura: "Array-Based Mapping Algorithm of Logic Functions into Plastic Cell Architecture"IEICE Trans. Fundamentals. Vol.E83-A No.12. 2538-2544 (2000)

    • Related Report
      2001 Annual Research Report
  • [Publications] K.Chikamura, T.Izumi, T.0noye, Y.Nakamura: "IEEE1394 System Simulation Environment and a Design of its Link Layer Controller"Proc. 2001 IEEE International Symposium on Circuits and Systems. V. 1-4 (2001)

    • Related Report
      2001 Annual Research Report
  • [Publications] H.Tsutsui, T.Izumi, T.Onoye, Y.Nakamura, et al.: "Design of JPEG2000 Encoder for Fully Scalable Image Coding"Prof. 5th World Multi-Conference on Systemics, Cybernetics and Informatics. 1. (2001)

    • Related Report
      2001 Annual Research Report
  • [Publications] T.Okamoto, T.Izumi, T.Onoye, Y.Nakamura, et al.: "C-Based Design Automation Environment for Plastic Cell Architecture"Proc. 10th Workshop of Synthesis And System Integration of MIxed Technologies. 1. 45-49 (2001)

    • Related Report
      2001 Annual Research Report
  • [Publications] H.Tsutsui, T.Izumi, T.Onoye, Y.Nakamura, et al.: "LUT-Array-Based PLD and Synthesis Approach Based on Sum of Generalized Complex Terms Expression"IEICE Trans.Fundamentals. Vol.E84-A No.11. 2681-2689 (2001)

    • Related Report
      2001 Annual Research Report
  • [Publications] T.Izumi,Y.Nakamura, et al.: "Array-Based Mapping Algorithm of Logic Functions into Plastic Cell Architecture"Proc.Workshop of Synthesis And System Integration of MIxed Technologies. 1. 91-98 (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] D.Murakami,T.Izumi,T.Onoye,Y.Nakamura: "A Hardware Algorithm of Dynamic Area Allocation to Circuits for Plastic Cell Architecture"Proc.Euromedia Conference. 1. 85-89 (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] 筒井弘,泉知論,尾上孝雄,中村行宏 他: "LUTアレイ型PLDの設計と論理関数の埋め込み手法"DAシンポジウム論文集. 1. 21-26 (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] 杉本成範,中村行宏 他: "LUTアレイ型PLDの設計と試作"VDEC LSIデザイナーフォーラム資料集. 1. 38-41 (2000)

    • Related Report
      2000 Annual Research Report
  • [Publications] T.Izumi,Y.Nakamura, et al.: "Array-Based Mapping Algorithm of Logic Functions into Plastic Cell Architecture"IEICE Trans.Fundamentals. E83-A. 2538-2544 (2000)

    • Related Report
      2000 Annual Research Report

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Published: 2000-04-01   Modified: 2016-04-21  

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