| Project/Area Number |
13450129
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Electronic materials/Electric materials
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| Research Institution | Hiroshima University |
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Principal Investigator |
NAKAJIMA Anri Hiroshima University, Research Center for Nanodevices and Systems, Associate Professor, ナノデバイス・システム研究センター, 助教授 (70304459)
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| Co-Investigator(Kenkyū-buntansha) |
YOKOYAMA Shin Hiroshima University, Research Center for Nanodevices and Systems, Professor, ナノデバイス・システム研究センター, 教授 (80144880)
KIKKAWA Takamaro Hiroshima University, Research Center for Nanodevices and Systems, Professor, ナノデバイス・システム研究センター, 教授 (60304458)
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| Project Period (FY) |
2001 – 2003
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| Project Status |
Completed (Fiscal Year 2003)
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| Budget Amount *help |
¥11,200,000 (Direct Cost: ¥11,200,000)
Fiscal Year 2003: ¥2,000,000 (Direct Cost: ¥2,000,000)
Fiscal Year 2002: ¥4,400,000 (Direct Cost: ¥4,400,000)
Fiscal Year 2001: ¥4,800,000 (Direct Cost: ¥4,800,000)
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| Keywords | metal gate / high-k metal oxide / gate dielectrics / stack structure / atomic-layer deposition / continuous deposition / zirconia / hafnia / 原始層成長 |
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| Research Abstract |
Till 2001 fiscal year, atomic-layer deposition (ALD) of ZiO_2 for the next generation gate dielectrics has been studied using (ZTB:Zr(t-OC_4H_9)_4) and H_2O. Also, an ultrathin Si nitride layer as a barrier layer for the interfacial layer was deposited on a Si substrate by ALD. Then, ALD ZiO_2 was deposited on the ALD Si nitride, forming the stack gate structure. The ALD Si-nitride layer successfully suppressed the formation of an SiO_2 interfacial layer. In 2003 fiscal year, more detail study of the growth was carried out to examine the film quality and ALD mechanism. Leak current characteristics were examined for capacitors and the current was found to be due to direct tunneling both for ALDZrO_2/ALD Si-nitride stack gate dielectrics and ALDZrO_2 gate dielectrics. Also, to suppress interface reaction between poly-Si gate and gate dielectrics, the possibility of Si nitride formation using ALD on ZrO_2 was examined. On the other hand, the possibility of HfO_2 was examined using the alternate exposure of Hf(HFAcAc)_4 and H_2O because HfO_2 is the most promising candidate for the future high-k gate dielectrics. However, films with good quality could not be obtained. n-MOSFETs with ALD Si-nitride gate dielectrics (EOT=2.3 nm) were fabricated to evaluate the thin film property for the application to the ALD high-k dielectric/ALD Si-nitride stack gate dielectrics. The maximum value of electron mobility for the ALD Si nitride is about 80% compared with that for SiO_2. However, hot-carrier induced and direct tunneling injection induced mobility degradation in transistors is smaller for the ALD Si nitride than for SiO_2. This is considered to be due to the smaller interface and bulk trap generation for the ALD Si nitride than for SiO_2. Therefore, the ALD Si-nitride gate dielectrics has a possibility to be used for 65 nm technology node generation (EOT= 1.0 nm).
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