New device structure of sub-10nm Si MOSFET/SOI
| Project/Area Number |
13450138
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
電子デバイス・機器工学
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| Research Institution | Tokyo Institute of Technology |
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Principal Investigator |
SAKAI Tetsushi Tokyo Institute of Technology, Interdisciplinary Graduate School of Science and Technology, Professor, 大学院・総合理工学研究科, 教授 (60313368)
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| Co-Investigator(Kenkyū-buntansha) |
MUROTA Junichi Tohoku University, Research Institute of Electrical Communication, Professor, 電気通信研究所, 教授 (70182144)
MATSUO Seitaro NTT AFTY Corporation, Director, 技師長
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| Project Period (FY) |
2001 – 2002
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| Project Status |
Completed (Fiscal Year 2002)
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| Budget Amount *help |
¥15,100,000 (Direct Cost: ¥15,100,000)
Fiscal Year 2002: ¥3,500,000 (Direct Cost: ¥3,500,000)
Fiscal Year 2001: ¥11,600,000 (Direct Cost: ¥11,600,000)
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| Keywords | sub-10nm / MOSFET / SOI / ML-MOSFET / short channel effect / etching selectivity of SiGe / ECR sputtering / AlN_xO_y thin film / high-k gate insulator / サブ10ナノメータ / 駆動電流 / SiGe / 原子層制御窒素ドープエピタキシャル層 |
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| Research Abstract |
(1)From the investigation of fabrication processes and device simulations for the new-structure nMOSFET/SOI, the device structure has been further developed to have higher performance, and finally, the new-structure ML-MOSFET (Multi Layer Channel MOSFET), which has multi channel layers stacked vertically, and its fabrication processes have been contrived.
(2)The device simulation was performed to investigate the device characteristics of the new-structure ML-MOSFET. It was found that the short channel effect was suppressed down to sub 10 nm gate length of ML-MOSFET by thinning of Si-channel layers, and its drive current of more than 3 mA/μm was obtained.
(3)The fabrication process of new-structure ML-MOSFET was investigated. The new process to fabricate the ultra-thin multi channel Si layers was contrived and demonstrated experimentally by using the etchant of HNO_3:H_2O:HF=90:60:1,which has the etching selectivity of SiGe more than 100 compared to that of Si, and adopting it to the Si/SiGe/Si/SiGe/Si/SiGe multi layers deposited.
(4)AlN_xO_y thin film deposited by ECR sputtering method was investigated for high-k gate insulator applications. It was found that the electrical characteristics of AlN_xO_y thin films formed by the O_2 plasma oxidation of AlN thin films were improved by the 1000℃ rapid thermal annealing.
(5)The basic patent for the new-structure ML-MOSFET and its fabrication processes was applied, and the patent for the ferroelectric random access memories with ML-MOSFET was also applied.
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Report
(3 results)
Research Products
(34 results)
