| Project/Area Number |
14350175
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
電子デバイス・機器工学
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| Research Institution | Tohoku University |
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Principal Investigator |
NAKAJIMA Koji Tohoku University, Research Institute of Electrical Communication, Professor, 電気通信研究所, 教授 (60125622)
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| Co-Investigator(Kenkyū-buntansha) |
SATO Shigeo Tohoku University, Research Institute of Electrical Communication, Associate professor, 電気通信研究所, 助教授 (10282013)
HAYAKAWA Yoshihiro Tohoku University, Research Institute of Electrical Communication, Research associate, 電気通信研究所, 助手 (20250847)
ONOMI Takeshi Tohoku University, Research Institute of Electrical Communication, Research associate, 電気通信研究所, 助手 (70312676)
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| Project Period (FY) |
2002 – 2005
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| Project Status |
Completed (Fiscal Year 2005)
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| Budget Amount *help |
¥14,900,000 (Direct Cost: ¥14,900,000)
Fiscal Year 2005: ¥2,100,000 (Direct Cost: ¥2,100,000)
Fiscal Year 2004: ¥2,100,000 (Direct Cost: ¥2,100,000)
Fiscal Year 2003: ¥3,300,000 (Direct Cost: ¥3,300,000)
Fiscal Year 2002: ¥7,400,000 (Direct Cost: ¥7,400,000)
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| Keywords | Inverse function / Negative resistance / Optimization problem / Chaos / Active artificial brain / Integrated circuit / Delay / Inverse Delay |
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| Research Abstract |
The purpose of this subject is construct a macro connecting system with silicon neuron units which have basic active properties including excitable oscillation nature to obtain the Brain like information system by using the constructive method. We proposed the Inverse function Delayed (ID) model. The model is able to increase the memory capacity for association without decrease of basin size for the memorized patterns. Furthermore, the model, which is modified into a discrete time model, achieves 100% success rate for combinatorial optimization problems with high processing speed. We have successfully carried out the TSP problems over 100 cities and etc. We also analyzed the parameter dependence of the performance of the ID model for 100% success rate of one of combinatorial optimization problems. We proposed the memory system for time sequential patterns by using the ID model. Hardware integrated system for the ID model has been investigated as an analog circuit and a digital FPGA chip. We confirmed the operation of the developed system for the ID hardware model. The ID model has been developed to the burst firing model, and its hardware system was also constructed. We are going to construct the active artificial brain system as a next research target.
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