| Budget Amount *help |
¥14,400,000 (Direct Cost: ¥14,400,000)
Fiscal Year 2004: ¥1,400,000 (Direct Cost: ¥1,400,000)
Fiscal Year 2003: ¥2,900,000 (Direct Cost: ¥2,900,000)
Fiscal Year 2002: ¥10,100,000 (Direct Cost: ¥10,100,000)
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| Research Abstract |
The head investigator has succeeded in fabricating a Si/SiGe resonant tunneling diode(RTD) which exhibits a peak-to-valley current ratio of as high as 7.6 in 1998 by applying a combination of electron tunneling and a multiple well structure on the basis of theoretical calculation. Further, we have proposed a thin double-layer strain-relaxed buffer as important technology for the electron-tunneling Si/SiGe RTD fabrication and have obtained a PVCR value of as high as〜180.
In this work, in order to realize quantum-effect high-speed Si-system devices, on the basis of these achievements, we aimed at establishing electron-tunneling Si/SiGe RTD device technology and basic technology for the device integration.
First, we have cleared the strain-relaxation mechanisms for the thin double-layer strain-relaxed buffer and its fabrication conditions. The 1st buffer layer grows coherently, however, upon 10-nm 2nd buffer layer growth, the 1st layer relaxes and the surface threading dislocation remains l
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ow. Thus, we have cleared that the 2nd buffer layer relaxes the 1st buffer layer and restrains the threading dislocations form propagating to the surface. On the basis of the results, we have further proposed a thin triple-layer buffer with which the positions of the lattice mismatch dislocation can be better controlled. We have cleared the fabrication principle and conditions. With the thin triple-layer buffer, we have a strain-relaxed buffer with high crystallinity and high relaxation rate, and have succeeded in fabricating high performance Si/SiGe RTD, the PVCR of which surpasses III-V RTDs. With these experimental results, we demonstrate that Si/SiGe quantum well tunneling structures are very useful as a practical device. Further, as basic integration technology, we have developed current density control method and device isolation technology.
Through these works, we have cleared the Si/SiGe RTD device construction technology and the basic integration technology such as device current control and device isolation technology. In this project, we have achieved the technological fundamentals for Si/SiGe electron-tunneling RTD device technology. Less
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