• Search Research Projects
  • Search Researchers
  • How to Use
  1. Back to previous page

Crystallographic Evaluation of Ultrathin SOI Substrates and Impurity Diffusion Modeling for Nanometer LSIs

Research Project

Project/Area Number 14550323
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeSingle-year Grants
Section一般
Research Field 電子デバイス・機器工学
Research InstitutionNagoya Institute of Technology

Principal Investigator

ARAI Eisuke  Nagoya Institute of Technology, Graduate School of Engineering, Professor, 大学院・工学研究科, 教授 (90283473)

Co-Investigator(Kenkyū-buntansha) ICHIMURA Masaya  Nagoya Institute of Technology, Graduate School of Engineering, Professor, 大学院・工学研究科, 教授 (30203110)
KATO Masashi  Nagoya Institute of Technology, Graduate School of Engineering, Research Associate, 大学院・工学研究科, 助手 (80362317)
内田 秀雄  名古屋工業大学, 工学部・電気情報工学科, 助手 (10293739)
Project Period (FY) 2002 – 2004
Project Status Completed (Fiscal Year 2004)
Budget Amount *help
¥3,600,000 (Direct Cost: ¥3,600,000)
Fiscal Year 2004: ¥600,000 (Direct Cost: ¥600,000)
Fiscal Year 2003: ¥900,000 (Direct Cost: ¥900,000)
Fiscal Year 2002: ¥2,100,000 (Direct Cost: ¥2,100,000)
KeywordsSOI substrate / buried oxide / new donor / μ-PCD method / carrier density distribution / recombination velocity of point defect density / process simulator / pair diffusion model / SOI / 界面再結合速度 / 発生ライフタイム / B拡散 / P拡散 / 拡散モデル / シリコンLSI / 極薄SOI / 埋込酸化膜 / 不純物拡散 / キャリア分布 / 界面電荷密度 / 耐圧 / 埋込み酸化膜 / ニュードナー / ひ素 / アンチモン
Research Abstract

1.Crystalline Quality Evaluation of SOI Substrates
(1)Changes of Carrier Density Distribution in SOI Substrates with Annealing
Carrier distribution changes in SOI substrates with annealing were measured. The changes depend on both Si layer thickness of SOI substrates and annealing temperature. For Si layer thicker than 1 μm, the inversion layer is generated with annealing near 1000℃ at the buried oxide interface of p-type SOI substrates, while the accumulation layer is generated at the interface of n-type SOI substrates.. For Si layer thinner than 1 μm, n-type donor is generated with annealing of 700-800℃. The donor level is below 0.03eV and the origin of the donor is considered to be due to the oxygen precipitation, i.e., so-called new donor.
(2)Electrical Characteristics Evaluation of Buried Oxide (BOX) Interface
the carrier recombination velocity of BOX interface was measured using μ-PCD method. The velocity is 500-1800 cm/s which is about 100 times larger than that for the conventional … More interface of Si and thermal silicon oxide.
2.Impurity Diffusion Modeling for SOI Substrates
(1)Comparison of B Diffusion Profiles in 3 kinds of Ultrathin SOI Substrates
B diffusion profiles in 3 kinds of ultra-thin SOI substrates (SIMOX, UNIBOND and ELTRAN) were compared. The diffusion depths in the SOI substrates were shallower than those in bulk Si and the depth in SIMOX is the shallowest among 3kinds of SOI substrates. These results show the crystalline quality of BOX interface and the recombination velocity of point defects at the interface is the fastest for SIMOX substrates.
(2)Accuracy of Process Simulator on the Market and Diffusion Modeling
From the B and P predeposition profiles in bulk Si and SOI substrates, diffusion parameters for simulation were extracted. Using the parameters, the drive-in diffusion profiles were simulated using the process simulator on the market and compared with experimental profiles. The experimental profiles are deeper than those simulated, which suggests that the diffusion enhancement mechanism in drive-in process should be taken in the process simulator. Less

Report

(4 results)
  • 2004 Annual Research Report   Final Research Report Summary
  • 2003 Annual Research Report
  • 2002 Annual Research Report
  • Research Products

    (18 results)

All 2004 2003 2002 Other

All Journal Article (12 results) Publications (6 results)

  • [Journal Article] Conduction type change with annealing in thin silicon-on-insulator wafers2004

    • Author(s)
      Y.Shibata, M.Ichimura, E.Arai
    • Journal Title

      Solid-State Electronics 48

      Pages: 1249-1252

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2004 Annual Research Report 2004 Final Research Report Summary
  • [Journal Article] Sb Pile-up at Oxide and Si Interface during Drive-in Process after Predeposition Using Doped Oxide Source2003

    • Author(s)
      T.Ichino, H.Uchida, M.Ichimura, E.Arai
    • Journal Title

      Jpn.J.Appl.Phys. 42

      Pages: 1139-1144

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Applicability of Phosphorus and Boron Diffusin Parameters Extracted from Predeposition to Drive-in Diffusion for Bulk Si and Silicon-on-Insulaor2003

    • Author(s)
      E.Arai, D.Iida, H.Asai, Y.Ieki, H.Uchida, M.Ichimura
    • Journal Title

      Jpn.J.Appl.Phys. 42

      Pages: 1503-1510

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] As and Sb Diffusion in Thin Silicon-on-Insulator Wafers2003

    • Author(s)
      Y.Shibata, M.Ichimura, E.Arai
    • Journal Title

      Jpn.J.Appl.Phys. 42

      Pages: 4282-4283

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Interface recombination velocity of silicon-on-insulator wafers measured by microwave reflectance photoconductivity decay method with electric field2003

    • Author(s)
      T.Kuwayama, M.Ichimura, E.Arai
    • Journal Title

      Appl.Phys.Letters 83

      Pages: 928-930

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2004 Annual Research Report 2004 Final Research Report Summary
  • [Journal Article] Applicability of Phosphorus and Boron Diffusion Parameters Extracted from Predeposition to Drive-in Diffusion for Bulk Silicon and Silicon-on-Insulator2003

    • Author(s)
      E.Arai, D.Iida, H.Asai, Y.Ieki, H.Uchida, M.Ichimura
    • Journal Title

      Jpn.J.Appl.Phys. 42

      Pages: 1503-1510

    • NAID

      80015914766

    • Related Report
      2004 Annual Research Report
  • [Journal Article] As and Sb diffusion profiles in thin silicon-on-insulator wafers2002

    • Author(s)
      Y.Shibata, M.Ichimura, E.Arai
    • Journal Title

      Extended Abstracts of the 3^<rd> International Workshop on Junction Technology

      Pages: 89-90

    • NAID

      130004531037

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Boron Diffusion Profiles in Ultrathin Silicon-on-Insulator Structures and Their Relation to Crystalline Quality2002

    • Author(s)
      H.Uchida, M.Ichimura, E.Arai
    • Journal Title

      Jpn.J.Appl.Phys. 41

      Pages: 4436-4441

    • NAID

      110006341535

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Changes in carrier profiles of bonded SOI wafers with thermal annealing measured by the spreading resistance method2002

    • Author(s)
      M.Ichimura, S.Ito, E.Arai
    • Journal Title

      Solid-State Electronics 46

      Pages: 545-553

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] As and Sb diffusion profiles in thin silicon-on-insulator2002

    • Author(s)
      Y.Shibata, M.Ichimura, E.Arai
    • Journal Title

      Extended Abstracts of the 3^<rd> International Workshop on Junction Technology

      Pages: 89-90

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Boron Diffusion Profiles in Ultrathin Silicon-on-Insulator Structvires and Their Relation to Crystalline Quality2002

    • Author(s)
      H.Uchida, M.Ichimura, E.Arai
    • Journal Title

      Jpn.J.Appl.Phys. 41

      Pages: 4436-4441

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Applicability of Phosphorus and Boron Diffusion Parameters Extracted from Predeposition to Drive-in Diffusion for Bulk Si and Silicon-on-Insulator2002

    • Author(s)
      E.Arai, D.Iida, H.Asai, Y.Ieki, H.Uchida, M.Ichimura
    • Journal Title

      Jpn.J.Appl.Phys. 42

      Pages: 1503-1510

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Publications] Y.Shibata, I.Ichino, M.Ichimura, E.Arai: "As and Sb Diffusion in Thin Silicon-On-Insulator Wafers"Jpn.J.Appl.Phys.. 42. 4282-4283 (2003)

    • Related Report
      2003 Annual Research Report
  • [Publications] Y.Shibata, M.Ichimura, E.Arai: "As and Sb diffusion profiles in thin silicon-on-insulator wafers"Extended Abstracts of the 3^<rd> International Workshop on Junction Technology. 89-90 (2002)

    • Related Report
      2002 Annual Research Report
  • [Publications] H.Uchida, M.Ichimura, E.Arai: "Boron Diffusion Profiles in Ultrathin Silicon-on-Insulator Structures and Their Relation to Crystalline Quality"Jpn. J. Appl. Phys.. 41. 4436-4441 (2002)

    • Related Report
      2002 Annual Research Report
  • [Publications] M.Ichimura, S.Ito, E.Arai: "Changes in carrier profiles of bonded SOI wafers with thermal annealing measured by the spreading resistance method"Solid-State Electronics. 46. 545-553 (2002)

    • Related Report
      2002 Annual Research Report
  • [Publications] T.Ichino, H.Uchida, M.Ichimura, E.Arai: "Sb Pile-up at Oxide and Si Interface during Drive-in Process after Predeposition Using Doped Oxide Source"Jpn. J. Appl. Phys.. 42(掲載予定). (2003)

    • Related Report
      2002 Annual Research Report
  • [Publications] E.Arai, D.Iida, H.Asai, Y.Ieki, H.Uchida, M.Ichimura: "Applicability of Phosphorus Boron Diffusion Parameters Extracted from Predeposition to Drive-in Diffusion for Bulk and silicon-on-Insulator"Jpn. J. Appl. Phys.. 42(掲載予定). (2003)

    • Related Report
      2002 Annual Research Report

URL: 

Published: 2002-04-01   Modified: 2016-04-21  

Information User Guide FAQ News Terms of Use Attribution of KAKENHI

Powered by NII kakenhi