| Budget Amount *help |
¥3,500,000 (Direct Cost: ¥3,500,000)
Fiscal Year 2003: ¥1,300,000 (Direct Cost: ¥1,300,000)
Fiscal Year 2002: ¥2,200,000 (Direct Cost: ¥2,200,000)
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| Research Abstract |
The objective of this research is to investigate the network architecture for high-performance cluster computers. In this research, a network interface, a network switch, device drivers, and communication APIs have been developed and evaluated. The network interface(NI) is connected to the host PC via PCI bus. The NI and the switch consist of the dedicated hardware for efficient communication and a high-performance processor. The processor is tightly coupled with the communication hardware to provide the capability of autonomous support for communication frequently observed in parallel and distributed computing. We have developed a novel link-layer protocol, which extracts a maximum potential performance of the physical layer, and implemented by hardware. We have also developed an access analysis software. This software, based on the information of synchronizations, analyzes access dependency among shared variables and generates calls to the appropriate data transfer functions. To realize an efficient programming environment, high-performance communication library, a standard communication protocol TCP/IP, and the standard message passing library MPI have been developed.
From the results of evaluation, it has been confirmed that the proposed network can achieve low-latency and high-throughput communication. It has been also confirmed that 88% of throughput of the physical layer can be extracted by effective use of high-level autonomy and dedicated hardware of the proposed network. The results of the comparison with other conventional networks showed that we can obtain high communication performance for the standard communication software such as MPI and TCP/IP.
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