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Optimization of video coding/decoding system based on data-reuse.

Research Project

Project/Area Number 14580399
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeSingle-year Grants
Section一般
Research Field 計算機科学
Research InstitutionFukuoka University

Principal Investigator

MOSHNYAGA V.G.  Fukuoka University, Faculty of Engineering, Professor, 工学部, 教授 (40243050)

Co-Investigator(Kenkyū-buntansha) SUETSUGU Tadashi  Fukuoka University, Faculty of Engineering, Associate Professor, 工学部, 助教授 (60279255)
TSURUTA Naoyuki  Fukuoka University, Faculty of Engineering, Associate Professor, 工学部, 助教授 (60227478)
INOUE Koji  Kyushu University, Graduate School of Information Science and Electrical Engineering, Associate Professor, 大学院・システム情報科学研究院, 助教授 (80341410)
Project Period (FY) 2002 – 2004
Project Status Completed (Fiscal Year 2004)
Budget Amount *help
¥3,600,000 (Direct Cost: ¥3,600,000)
Fiscal Year 2004: ¥800,000 (Direct Cost: ¥800,000)
Fiscal Year 2003: ¥900,000 (Direct Cost: ¥900,000)
Fiscal Year 2002: ¥1,900,000 (Direct Cost: ¥1,900,000)
Keywordsvideo processing / video coding / motion estimation / data-reuse / adaptive algorithms / memory optimization / low power / design methods
Research Abstract

With the growing popularity of portable video phones, energy dissipation of video coding/decoding becomes very important. In this project we investigated a new methodology to lower computational complexity and energy consumption of video codec based on data reuse. The results obtained can be classified as follows:
(a) Development of new methodology for data-reusable video codec.
We investigated a new concept of content-based macroblock data-reuse and developed algorithms for its implementation. New algorithms have been proposed for data-reusable motion estimation, computationally adaptive DCT, and quantization, video memory sharing, variable bit-width subtraction, adaptive memory accessing, etc. Unlike conventional techniques, these algorithms dynamically detect unchanged data on the macroblock, pixel and bit levels, and then reuse the data instead of
re-computing and re-writing the data to the memory.
(b) Development of new data-reusable processor architecture.
A novel architecture capable of exploiting picture correlation for reducing computations and memory accesses in video coding/decoding has been proposed. Due to dynamic memory sharing among reference frames, data-driven macroblock characterization and selective macroblock processing, and the architecture can efficiently reuse data stored in frame memory to omit redundant calculations and data
re-writes for the stationary macroblocks. A number of new architectural optimizations to reuse data in processing elements, frame memory, register files and caches have been devised.
(c) Development and experimental evaluation of prototype video encoding system
A prototype MPEG2 video coding/decoding software system has been developed and evaluated on standard video benchmarks. The experiments showed that the system is very efficient and can reduce the video coding/encoding computations and, memory accesses by more than 85% while maintaining high picture quality.

Report

(4 results)
  • 2004 Annual Research Report   Final Research Report Summary
  • 2003 Annual Research Report
  • 2002 Annual Research Report
  • Research Products

    (42 results)

All 2004 2003 2002 Other

All Journal Article (28 results) Book (2 results) Publications (12 results)

  • [Journal Article] Reduction of Background Computations in Block-Matching Motion Estimation2004

    • Author(s)
      V.G.Moshnyaga, K.Masunaga
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E87-A, no.3

      Pages: 539-546

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2004 Annual Research Report 2004 Final Research Report Summary
  • [Journal Article] An Implementation of Data Reusable MPEG Video Coding Scheme2004

    • Author(s)
      V.G.Moshnyaga
    • Journal Title

      Proceedings of the International Conference on Signal Processing (ICSP 2004)

      Pages: 257-260

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2004 Annual Research Report 2004 Final Research Report Summary
  • [Journal Article] A Data Reusing Architecture for MPEG Video Coding2004

    • Author(s)
      V.G.Moshnyaga, K.Masunaga, N.Kajiwara
    • Journal Title

      Proceedings of the 2004 IEEE International Symposium on Circuits and Systems(ISCAS 2004) Vol.III

      Pages: 797-800

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] A Low Power I-Cache Design with Tag-Comparison Reuse2004

    • Author(s)
      K.Inoue, H.Tanaka, V.G.Moshnyaga, K.Murakami
    • Journal Title

      Proceedings of the International Symposium on System-On-Chip (SOC04)

      Pages: 148-153

    • NAID

      120006655316

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2004 Annual Research Report 2004 Final Research Report Summary
  • [Journal Article] タグ比較再利用による低消費電力命令キャッシュの設計と評価2004

    • Author(s)
      田中秀和, 井上弘士, モシニャガワシリー, 村上和彰
    • Journal Title

      第17回 回路とシステム(軽井沢)ワークショップ

      Pages: 229-234

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Reduction of background computations in block-matching motion estimation2004

    • Author(s)
      V.G.Moshnyaga, K.Masunaga
    • Journal Title

      IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences Vol.E87-A no.3

      Pages: 539-546

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] A data reusing architecture for MPEG video coding2004

    • Author(s)
      V.G.Moshnyaga, K.Masunaga, N.Kajiwara
    • Journal Title

      Proceedings of the IEEE Int. Symp. on Circuits and Systems Vol.3

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Impact of register-cache bandwidth variation on processor performance2004

    • Author(s)
      K.Hamayasu, V.G.Moshnyaga
    • Journal Title

      Advances in Computer Systems Architecture", 9th Asia-Pacific Conference, Proceedings (Springer) LNCS 3189

      Pages: 212-225

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] A low-power cache with tag comparison reuse2004

    • Author(s)
      K.Inoue, H.Tanaka, V.G.Moshnyaga, K.Murakami
    • Journal Title

      Proceedings of the International Symposium on System-On-Chip

      Pages: 61-67

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] An implementation of data reusable MPEG video coding scheme2004

    • Author(s)
      V.G.Moshnyaga
    • Journal Title

      Proceedings of the International Conference on Signal Processing

      Pages: 257-261

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] A Data Reusing Architecture for MPEG Video Coding2004

    • Author(s)
      V.G.Moshnyaga, K.Masunaga, N.Kajiwara
    • Journal Title

      Proceedings of the 2004 IEEE International Symposium on Circuits and Systems (ISCAS 2004) Vol.III

      Pages: 797-800

    • Related Report
      2004 Annual Research Report
  • [Journal Article] タグ比較再利用による低消費電力命令キャッシュの設計と評価2004

    • Author(s)
      田中秀和, 井上弘士, モシニャガワシリー, 村上和彰
    • Journal Title

      第17回回路とシステム(軽井沢)ワークショップ

      Pages: 229-234

    • Related Report
      2004 Annual Research Report
  • [Journal Article] Reducing switching activity of subtraction via variable truncation of the most significant bits2003

    • Author(s)
      V.G.Moshnyaga
    • Journal Title

      The Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology Vol.33 no.1-2

      Pages: 75-82

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Instruction encoding for reducing energy consumption of I-ROMs based on execution locality2003

    • Author(s)
      K.Inoue, V.G.Moshnyaga, K.Murakami
    • Journal Title

      IEICE Transactions on Electronics Vol.E86-C

      Pages: 799-805

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Reducing DCT operations based on zero value prediction2003

    • Author(s)
      Y.Nishida, K.Inoue, V.G.Moshnyaga
    • Journal Title

      Proceedings of the 16 Workshop on Circuits and Systems in Karuizawa

      Pages: 147-152

    • NAID

      120006655410

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] A zero-value prediction technique for fast DCT computation2003

    • Author(s)
      Y.Nishida, K.Inoue, V.G.Moshnyaga
    • Journal Title

      Proceedings of the 2003 IEEE Workshop on Signal Processing Systems

      Pages: 27-29

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Reducing access count to register files through operand reuse2003

    • Author(s)
      H.Takamura, K.Inoue, V.G.Moshnyaga
    • Journal Title

      Advances in Computer Systems Architecture, Asia-Pacific Conference Proceedings (Springer, Berlin) LNCS 2823

      Pages: 112-121

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] A Memory Reduction Approach for MPEG Video Coding2003

    • Author(s)
      N.Kajiwara, V.G.Moshnyaga
    • Journal Title

      Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems

      Pages: 399-402

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Design of a low-power instruction cache with tag comparison reuse2003

    • Author(s)
      H.Tanaka, K.Inoue, V.G.Moshnyaga, K.Murakami
    • Journal Title

      Proceedings of the 17 Workshop on Circuits and Systems in Karuizawa

      Pages: 147-152

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Reducing energy dissipation of frame memory by adaptive bit-width compression2002

    • Author(s)
      V.G.Moshnyaga
    • Journal Title

      IEEE Trans. on Circuits and Systems for Video Technology Vol.12 No.8

      Pages: 713-718

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Adaptive bit-width compression for low power video memory design2002

    • Author(s)
      V.G.Moshnyaga
    • Journal Title

      IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences Vol.E85-A No.2

      Pages: 797-803

    • NAID

      110003216827

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] A history based I-cache for low-energy multimedia applications2002

    • Author(s)
      K.Inoue, V.G.Moshnyaga, K.Murakami
    • Journal Title

      Proceedings of the 2002 ACM/IEEE International Symposium on Low Power Electronics and Design

      Pages: 148-153

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Reducing energy consumption of video memory by bit-width compression2002

    • Author(s)
      V.G.Moshnyaga, K.Inoue, M.Fukagawa
    • Journal Title

      Proceedings of the 2002 ACM/IEEE International Symposium on Low Power Electronics and Design

      Pages: 142-147

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Reducing computation complexity of adaptive motion estimation through binary comparison2002

    • Author(s)
      V.G.Moshnyaga, K.Masunaga
    • Journal Title

      Proceedings of the 2002 IEEE International Symposium on Circuits and Systems Vol.2

      Pages: 484-487

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Reduction of memory accesses in motion estimation by block-data reuse2002

    • Author(s)
      V.G.Moshnyaga
    • Journal Title

      Proceedings of the 2002 IEEE International Conference on Acoustics, Speech and Signal Processing Vol.3

      Pages: 3128-3131

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] An efficient Hamming distance comparator for low-power applications2002

    • Author(s)
      M.Fujino, V.G.Moshnyaga
    • Journal Title

      Proceedings of the 9-th IEEE Int. Conf. on Electronics, Circuits and Systems

      Pages: 641-644

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Register file access reduction by data reuse2002

    • Author(s)
      H.Takamura, K.Inoue, V.GMoshnyaga
    • Journal Title

      Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation (Springer) LNCS2451

      Pages: 278-288

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] A low energy set-associative I-cache with extended BTB2002

    • Author(s)
      K.Inoue, V.G.Moshnyaga, K.Murakami
    • Journal Title

      Proceedings of the IEEE Int. Conference on Computer Design

      Pages: 187-192

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Book] Low Power Cache Design in "Low-Power Electronics Design", Chapter 252004

    • Author(s)
      V.G.Moshnyaga
    • Total Pages
      21
    • Publisher
      CRC Press
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2004 Annual Research Report 2004 Final Research Report Summary
  • [Book] Low power cache design, Chapter 25 in Low-Power Electronics Design (C. Piguet (Editor))2004

    • Author(s)
      V.G.Moshnyaga, K.Inoue
    • Publisher
      CRC press
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Publications] K.Inoue, V.G.Moshnyaga, K.Murakami: "Instruction Encoding for Reducing Power Consumption of I-ROM based on Execution Locality"IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E86-A, no.4. 797-803 (2003)

    • Related Report
      2003 Annual Research Report
  • [Publications] H.Takamura, K.Inoue, V.G.Moshnyaga: "Reducing Access Count to Register-Files through Operand Reuse"Proceedings of the 8-th Asia Pacific Conference (ACSAC 2003), Aizu-Wakamatsu, JAPAN. 112-121 (2003)

    • Related Report
      2003 Annual Research Report
  • [Publications] Y.Nishida, K.Inoue, V.G.Moshnyaga: "A Zero Value Prediction Technique for Fast DCT Computation"Proceedings of the 2003 IEEE Workshop on Signal Processing Systems Design and Implementation (SIPS 2003), Soul, KOREA. 165-170 (2003)

    • Related Report
      2003 Annual Research Report
  • [Publications] N.Kajiwara, V.G.Moshnyaga: "A Memory Reduction Approach for MPEG Video Coding"Proceedings of the 2003 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS 2003). 399-402 (2003)

    • Related Report
      2003 Annual Research Report
  • [Publications] M.Fujino, V.G.Moshnyaga: "Dynamic Operand Transformation for Low-Power Multiplier-Accumulator"Proceedings of the 2003 IEEE International Symposium on Circuits and Systems (ISCAS2003). 5. 345-348 (2003)

    • Related Report
      2003 Annual Research Report
  • [Publications] 西田 敬宏, 井上 弘士, Vasily G.Moshnyaga: "ゼロ値予測に基づくDCT演算数削減手法の提案とその評価"第16回 回路とシステム(軽井沢)ワークショップ論文集. 147-152 (2003)

    • Related Report
      2003 Annual Research Report
  • [Publications] V.G.Moshnyaga: "Adaptive Bit-width Compression for Low Power Video Memory Design"IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. E85-A,no.2. 797-803 (2002)

    • Related Report
      2002 Annual Research Report
  • [Publications] V.G.Moshnyaga: "Reducing Energy Dissipation of Frame Memory by Adaptive Bit-width Compression"IEEE Transactions on Circuits and Systems for Video Technology. Vol.12,no.8. 712-718 (2002)

    • Related Report
      2002 Annual Research Report
  • [Publications] V.G.Moshnyaga: "Reducing Switching Activity of Subtraction via Variable Truncation of the Most Significant Bits"The Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology. Vol.33,no.1-2. 75-82 (2003)

    • Related Report
      2002 Annual Research Report
  • [Publications] K.Inoue, V.G.Moshnyaga, K.Murakami: "A History-Based I-Cache for Low-Energy Multimedia Applications"Proceedings of the 2002 ACM/IEEE International Symposium on Low Power Electronics and Design, Monterey, CA, USA. 148-153 (2002)

    • Related Report
      2002 Annual Research Report
  • [Publications] V.G.Moshnyaga: "Reduction of Memory Accesses in Motion Estimation by Block-Data Reuse"Proceedings of the 2002 IEEE International Conference on Acoustics, Speech and Signal Processing, Orlando, FL, USA. Vol.3. 3128-3131 (2002)

    • Related Report
      2002 Annual Research Report
  • [Publications] H.Takamura, K.Inoue, V.G.Moshnyaga: "Register File Access Reduction by Data Reuse"Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation, Springer-Verlag. LNCS2451. 278-288 (2002)

    • Related Report
      2002 Annual Research Report

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Published: 2002-04-01   Modified: 2021-04-07  

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