Optimization of video coding/decoding system based on data-reuse.
Grant-in-Aid for Scientific Research (C)
|Allocation Type||Single-year Grants |
|Research Institution||Fukuoka University |
MOSHNYAGA V. G. Fukuoka University, Faculty of Engineering, Professor, 工学部, 教授 (40243050)
SUETSUGU Tadashi Fukuoka University, Faculty of Engineering, Associate Professor, 工学部, 助教授 (60279255)
TSURUTA Naoyuki Fukuoka University, Faculty of Engineering, Associate Professor, 工学部, 助教授 (60227478)
INOUE Koji Kyushu University, Graduate School of Information Science and Electrical Engineering, Associate Professor, 大学院・システム情報科学研究院, 助教授 (80341410)
|Project Period (FY)
2002 – 2004
Completed (Fiscal Year 2004)
|Budget Amount *help
¥3,600,000 (Direct Cost: ¥3,600,000)
Fiscal Year 2004: ¥800,000 (Direct Cost: ¥800,000)
Fiscal Year 2003: ¥900,000 (Direct Cost: ¥900,000)
Fiscal Year 2002: ¥1,900,000 (Direct Cost: ¥1,900,000)
|Keywords||video processing / video coding / motion estimation / data-reuse / adaptive algorithms / memory optimization / low power / design methods|
With the growing popularity of portable video phones, energy dissipation of video coding/decoding becomes very important. In this project we investigated a new methodology to lower computational complexity and energy consumption of video codec based on data reuse. The results obtained can be classified as follows:
(a) Development of new methodology for data-reusable video codec.
We investigated a new concept of content-based macroblock data-reuse and developed algorithms for its implementation. New algorithms have been proposed for data-reusable motion estimation, computationally adaptive DCT, and quantization, video memory sharing, variable bit-width subtraction, adaptive memory accessing, etc. Unlike conventional techniques, these algorithms dynamically detect unchanged data on the macroblock, pixel and bit levels, and then reuse the data instead of
re-computing and re-writing the data to the memory.
(b) Development of new data-reusable processor architecture.
A novel architecture capable of exploiting picture correlation for reducing computations and memory accesses in video coding/decoding has been proposed. Due to dynamic memory sharing among reference frames, data-driven macroblock characterization and selective macroblock processing, and the architecture can efficiently reuse data stored in frame memory to omit redundant calculations and data
re-writes for the stationary macroblocks. A number of new architectural optimizations to reuse data in processing elements, frame memory, register files and caches have been devised.
(c) Development and experimental evaluation of prototype video encoding system
A prototype MPEG2 video coding/decoding software system has been developed and evaluated on standard video benchmarks. The experiments showed that the system is very efficient and can reduce the video coding/encoding computations and, memory accesses by more than 85% while maintaining high picture quality.
Report (4 results)
Research Products (42 results)