• Search Research Projects
  • Search Researchers
  • How to Use
  1. Back to previous page

High Performance Parallel Processor System Using Three-Dimensional Processor Chip

Research Project

Project/Area Number 15106006
Research Category

Grant-in-Aid for Scientific Research (S)

Allocation TypeSingle-year Grants
Research Field Electron device/Electronic equipment
Research InstitutionTohoku University

Principal Investigator

KOYANAGI Mitsumasa  Tohoku University, Tohoku University, Graduate School of Engineering, Professor (60205531)

Co-Investigator(Kenkyū-buntansha) HANE Kazuhiro  Tohoku University, Graduate School of Engineering, Professor (50164893)
SAMUKAWA Seiji  Tohoku University, Graduate School of Engineering, Professor (30323108)
TANAKA Tetsu  Tohoku University, Graduate School of Engineering, Associate Professor (40417382)
FUKUSHIMA Takafumi  Tohoku University, Graduate School of Engineering, Assistant Professor (10374969)
栗野 浩之  東北大学, 大学院・工学研究科, 助教授 (70282093)
沈 正七  東北大学, 大学院・工学研究科, 助手 (00333849)
宮川 宣明  株式会社本田技研研究所, チーフリサーチャー(研究職)
Project Period (FY) 2003 – 2007
Project Status Completed (Fiscal Year 2007)
Budget Amount *help
¥114,530,000 (Direct Cost: ¥88,100,000、Indirect Cost: ¥26,430,000)
Fiscal Year 2007: ¥5,070,000 (Direct Cost: ¥3,900,000、Indirect Cost: ¥1,170,000)
Fiscal Year 2006: ¥18,460,000 (Direct Cost: ¥14,200,000、Indirect Cost: ¥4,260,000)
Fiscal Year 2005: ¥22,360,000 (Direct Cost: ¥17,200,000、Indirect Cost: ¥5,160,000)
Fiscal Year 2004: ¥30,940,000 (Direct Cost: ¥23,800,000、Indirect Cost: ¥7,140,000)
Fiscal Year 2003: ¥37,700,000 (Direct Cost: ¥29,000,000、Indirect Cost: ¥8,700,000)
KeywordsThree-Dimensionally Stacked Processor / Multiport Shared Memory / Three-Dimensional Integration / Wafer Bonding / Optical Interconnection / Optical Wave Guide / Parallel Processing System / High Speed Data Transfer / ウェーハ張り合わせ
Research Abstract

A new parallel processing system with shared memories was proposed. We designed a prototype system and evaluated its performance. Data to be shared are transferred to processor elements (PE's) through a high-speed multiport ring bus in this system. An optical interconnection is used as the high-speed multiport ring bus. The system performance was improved by using node-shared cache memories with three-dimensional structure which decreases the cache miss-hit rate. The performance increased almost in proportion to the number of PE.
We developed two key technologies of optical interconnection and three-dimensional integration to realize the proposed system. We succeeded in fabricating the optical waveguide with an extremely low signal propagation loss of 0.029dB/cm. We achieved a high-speed data transfer rate of 10Gbps using this optical waveguide with the length of 5cm. We also developed a new beam-lead bonding technology to directly integrate photodetectors and VCSEL's on LSI chip. We fabricated a test module using these technologies in which SRAM cache memories were connected by this optical waveguide and confirmed the optical data transfer among these SRAM cache memories.
Furthermore, we developed a three-dimensional integration technology based on wafer bonding. We succeeded in fabricating a three-dimensionally stacked microprocessor test chip for the first time in the world. We also fabricated a three-dimensionally stacked memory test chip with ten memory layers. In addition, we developed a new three-dimensional integration technology called a super-chip integration technology aiming to realize a further advanced system with stacked microprocessor and memory chips. We could stack various kinds of chips with different chip size and thickness by the super-chip integration.

Report

(6 results)
  • 2007 Annual Research Report   Final Research Report Summary
  • 2006 Annual Research Report
  • 2005 Annual Research Report
  • 2004 Annual Research Report
  • 2003 Annual Research Report
  • Research Products

    (160 results)

All 2008 2007 2006 2005 2004 2003 Other

All Journal Article (58 results) (of which Peer Reviewed: 20 results) Presentation (90 results) Book (2 results) Remarks (1 results) Patent(Industrial Property Rights) (3 results) Publications (6 results)

  • [Journal Article] Novel Optical/Electrical Printed Circuit Board with Polynorbomene Optical Waveguide2007

    • Author(s)
      Makoto, Fujiwara
    • Journal Title

      Japanese Journal of Applied Physics Vol.46

      Pages: 2395-2400

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] New Three-Dimensional Integration Technology Based on Reconfigured Wafer-on-Wafer Bonding Technique2007

    • Author(s)
      Takafumi, Fukushima
    • Journal Title

      IEEE International Electron Devices Meeting (IEDM) Tech. Dig.

      Pages: 985-988

    • NAID

      120002070107

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] Novel Optical/Electrical Printed Circuit Board with Polynorbornene Optical Waveguide2007

    • Author(s)
      Makoto, Fujiwara
    • Journal Title

      Japanese journal of Applied Physics Vol. 46

      Pages: 2395-2400

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Journal Article] New Three-Dimensional Integration Technology Based on Reconfigured Wafer-on-Wafer Bonding Technique2007

    • Author(s)
      Takafumi Fukushima
    • Journal Title

      IEEE International Electron Devices Meeting

      Pages: 985-988

    • NAID

      120002070107

    • Related Report
      2007 Annual Research Report
    • Peer Reviewed
  • [Journal Article] Novel Optical/Electrical Pringted Circuit Board with Polynorbornene Optical Waveguide2007

    • Author(s)
      Makoto Fujiwara
    • Journal Title

      Japanese Journal of Applied Physics Vol.46

      Pages: 2395-2400

    • Related Report
      2007 Annual Research Report
    • Peer Reviewed
  • [Journal Article] High performance polynorbornene optical waveguide for Opto-electric interconnections2007

    • Author(s)
      M.Fujiwara
    • Journal Title

      Polytronic 2007 6^<th> international IEEE conference on polymer and adhesives in microelectronics and Photonics

      Pages: 193-197

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Three-Dimensional Integration Technology Based on Wafer Bonding With Vertical Buried Interconnections2006

    • Author(s)
      Mitsumasa, Koyanagi
    • Journal Title

      IEEE TRANSACTIONS ON ELECTRON DEVICES Vol.53

      Pages: 2799-2808

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] Effect of Ion Implantation Damage on Elevated Source/Drain Formation for Ultrathin Body Silicon on Insulator Metal Oxide Semiconductor Field-Effect Transistor2006

    • Author(s)
      Hycukjae OH
    • Journal Title

      Japanese Journal of Applied Physics Vol.45,No.4B

      Pages: 2965-2969

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] Deep-Trench Etching for Chip-to-Chip Three-Dimensional Integration Technology2006

    • Author(s)
      Hirokazu KIKUCHI
    • Journal Title

      Japanese Journal of Applied Physics Vol.45,No.4B

      Pages: 3024-3029

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] New Three-Dimensional Integration Technology Using Chip-to-Wafer Bonding to Achieve Ultimate Super-Chip Integration2006

    • Author(s)
      Takafumi FUKUSHIMA
    • Journal Title

      Japanese Journal of Applied Physics Vol.45,No.4B

      Pages: 3032-3035

    • NAID

      10022540983

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] Characteristics of Silicon-on-Lw k Insulator Metal Oxide Semiconductor Field Effect Transistor with Metal Back Gate2006

    • Author(s)
      Yusuke YAMADA
    • Journal Title

      Japanese Journal of Applied Physics Vol.45,No.4B

      Pages: 3040-3044

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] Quantitative Derivation and Evaluation of Wire Length Distribution in Three-Dimensional Integrated Circuits Using Simulated Quenching2006

    • Author(s)
      Jun DEGUCHI
    • Journal Title

      Japanese Journal of Applied Physics Vol.45,No.4B

      Pages: 3260-3265

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] Multichip Shared Memory Module with Optical Interconnection for Parallel-Processor System2006

    • Author(s)
      Hirofumi KURIBARA
    • Journal Title

      Japanese Journal of Applied Physics Vol.45,No.4B

      Pages: 3504-3509

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] Effect of Ion Implantation Damage on Elevated Source/Drain Formation for Ultrathin Body Silicon on Insulator Metal Oxide Semiconductor Field-Effect Transistor2006

    • Author(s)
      Hycukjae OH
    • Journal Title

      Japanese Journal of Applied Physics Vol. 45, No. 4B

      Pages: 2965-2969

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Journal Article] Deep-Trench Etching for Chip-to-Chip Three-Dimensional Integration Technology2006

    • Author(s)
      Hirokazu KIKUCHI
    • Journal Title

      Japanese journal of Applied Physics Vol. 45, No. 4B

      Pages: 3024-3029

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Journal Article] New Three-Dimensional Integration Technology Using Chip-to-Wafer Bonding to Achieve Ultimate Super-Chip Integration2006

    • Author(s)
      Takafumi FUKUSHIMA
    • Journal Title

      Japanese Journal of Applied Physics Vol. 45, No. 4B

      Pages: 3030-3035

    • NAID

      10022540983

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Journal Article] Characteristics of Silicon-on-Lw κ Insulator Metal Oxide Semiconductor Field Effect Transistor with Metal Back Gate2006

    • Author(s)
      Yusuke YAMADA
    • Journal Title

      Japanese Journal of Applied Physics Vol. 45, No. 4B

      Pages: 3040-3044

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Journal Article] Quantitative Derivation and Evaluation of Wire Length Distribution in Three-Dimensional Integrated Circuits Using Simulated Quenching2006

    • Author(s)
      Jun DEGUCHI
    • Journal Title

      Japanese Journal of Applied Physics Vol. 45, No. 4B

      Pages: 3260-3265

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Journal Article] Quantitative Derivation and Evaluation of Wire Length Distribution in Three-Dimensional Integrated Circuits Using Simulated Quenching2006

    • Author(s)
      Hirofumi KURIBARA
    • Journal Title

      Japanese Journal of Applied Physics Vol. 45, No. 4B

      Pages: 3504-3509

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Journal Article] Sub-Atmospheric Chemical Vapor Deposition Process for Chip-to-Wafer 3-Dimensional Integration2006

    • Author(s)
      Hirokazu Kikuchi
    • Journal Title

      The 2006 International Conference on Solid State Devices and Materials

      Pages: 490-491

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Novel Opto-Electro Printed Circuit Board with Polynorbornene Optical Waveguide2006

    • Author(s)
      M.Fujiwara
    • Journal Title

      The 2006 International Conference on Solid State Devices and Materials

      Pages: 840-841

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Three-Dimensional Integration Technology Based on Wafer Bonding With Vertical Buried Interconnections2006

    • Author(s)
      Mitsumasa Koyanagi
    • Journal Title

      IEEE TRANSACTIONS ON ELECTRON DEVICES Vol. 53

      Pages: 2799-2808

    • Related Report
      2006 Annual Research Report
  • [Journal Article] ロボットビジョンシステムのための積層型並列リコンフィギャラブル画像処理プロセツサの設計2006

    • Author(s)
      杉村武昭
    • Journal Title

      電子情報通信学会論文誌 Vol. J89-D

      Pages: 1141-1152

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Effect of Ion Implantation Damage on Elevated Source/Drain Formation for Ultrathin Body Silicon on Insulator Metal Oxide Semiconductor Field-Effect Transistor2006

    • Author(s)
      Hycukjae OH
    • Journal Title

      Japanese Journal of Applied Physics Vol. 45

      Pages: 2965-2969

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Deep-Trench Etching for Chip-to-Chip Three-Dimensional Integration Technology2006

    • Author(s)
      Hirokazu KIKUCHI
    • Journal Title

      Japanese Journal of Applied Physics Vol. 45

      Pages: 3024-3029

    • Related Report
      2006 Annual Research Report
  • [Journal Article] New Three-Dimensional Integration Technology Using Chip-to-Wafer Bonding to Achieve Ultimate Super-Chip Integration2006

    • Author(s)
      Takafumi FUKUSHIMA
    • Journal Title

      Japanese Journal of Applied Physics Vol. 45

      Pages: 3030-3035

    • NAID

      10022540983

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Characteristics of Silicon-on-Lw K Insulator Metal Oxide Semiconductor Field Effect Transistor with Metal Back Gate2006

    • Author(s)
      Yusnke YAMADA
    • Journal Title

      Japanese Journal of Applied Physics Vol. 45

      Pages: 3040-3044

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Quantitative Derivation and Evaluation of Wire Length Distribution in Three-Dimensional Integrated Circuits Using Simulated Quenching2006

    • Author(s)
      Jun DEGUCHI
    • Journal Title

      Japanese Journal of Applied Physics Vol. 45

      Pages: 3260-3265

    • Related Report
      2006 Annual Research Report
  • [Journal Article] Multichip Shared Memory Module with Optical Interconnection for Parallel-Processor System2006

    • Author(s)
      Hirofumi KURIBARA
    • Journal Title

      Japanese Journal of Applied Physics Vol. 45

      Pages: 3504-3509

    • Related Report
      2006 Annual Research Report
  • [Journal Article] New Three-Dimensional Integration Technology Using Self-Assembly Technique2005

    • Author(s)
      Takafumi Fukushima
    • Journal Title

      IEEE International Electron Devices Meeting (IEDM) Tech. Dig.

      Pages: 359-362

    • NAID

      120002070106

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] Fundamental Properties of Organic Low-k Dielectrics Usable in the Cu Damascene Process2005

    • Author(s)
      Yutaka NOMURA
    • Journal Title

      Japanese Journal of Applied Physics Vol.44,No.11

      Pages: 7876-7882

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] Evaluation of a Novel Real-Shared Cache Module for High Effective Parallel Computing2005

    • Author(s)
      Zhe LIU
    • Journal Title

      International Transaction on Computer Science and Engineering Volume 7

      Pages: 13-26

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] New Three-Dimensional Integration Technology Using Self-Assembly Technique2005

    • Author(s)
      Takafumi Fukushima
    • Journal Title

      IEEE International Electron Device Meeting (IEDM) Tech. Dig.

      Pages: 359-362

    • NAID

      120002070106

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Journal Article] Fundamental Properties of Organic Low-κ Dielectrics Usable in the Cu Damascene Process2005

    • Author(s)
      Yutaka NOMURA
    • Journal Title

      Japanese Journal of Applied Physics Vol. 44, No. 11

      Pages: 7876-7882

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Journal Article] New Three-Dimensional Integration Technology Using Self-Assembly Technique2005

    • Author(s)
      T.Fukushima, Y.Yamada, H.Kikuchi, M.Koyanagi
    • Journal Title

      IEEE International Electron Devices Meeting (IEDM) Technical Digest

      Pages: 359-362

    • NAID

      120002070106

    • Related Report
      2005 Annual Research Report
  • [Journal Article] New Three-Dimensional Integration Technology Using Chip-to-Wafer Bonding to Achieve Ultimate Super Chip Integration2005

    • Author(s)
      Takafumi Fukushima, Yusuke Yamada, Mitsumasa Koyanagi, et al.
    • Journal Title

      The 2005 International Conference on Solid State Devices and Materials

      Pages: 64-65

    • NAID

      10022540983

    • Related Report
      2005 Annual Research Report
  • [Journal Article] Multi-Chip Shared-Memory Module with Optical Interconnection for Parallel Processor System2005

    • Author(s)
      Hirofumi Kuribara, Hiroyuki Hashimoto, Mitsumasa Koyanagi, et al.
    • Journal Title

      The 2005 International Conference on Solid State Devices and Materials

      Pages: 334-335

    • NAID

      10022541847

    • Related Report
      2005 Annual Research Report
  • [Journal Article] Deep Trench Etching for Chip-to-Chip Three-Dimensional Integration2005

    • Author(s)
      Hirokazu Kikuchi, Yusuke Yamada, Mitsumasa Koyanagi, et al.
    • Journal Title

      The 2005 International Conference on Solid State Devices and Materials

      Pages: 562-563

    • NAID

      10022542549

    • Related Report
      2005 Annual Research Report
  • [Journal Article] Estimation of Wire Length Distribution for Evaluating Performance Improvement of Three-Dimensional LSI2005

    • Author(s)
      Jun Deguchi, Yoshihiro Nakatani, Mitsumasa Koyanagi, et al.
    • Journal Title

      The 2005 International Conference on Solid State Devices and Materials

      Pages: 660-661

    • NAID

      10022542853

    • Related Report
      2005 Annual Research Report
  • [Journal Article] Design of a Novel Real-Shared Cache Module for High Performance Parallel Processor System on chip2005

    • Author(s)
      Zhe LIU, Mitsumasa KOYANAGI, Hiroyuki KURINO
    • Journal Title

      GESTS International Transaction on Computer Science and Engineering 7(1)

      Pages: 13-26

    • Related Report
      2005 Annual Research Report
  • [Journal Article] High-Resolution Long-Array Thermal Ink Jet Printhead Fabricated by Anisotropic Wet Etching and Deep Si RIE2004

    • Author(s)
      Regan Nayve
    • Journal Title

      JOURNAL OF MICROELECTROMECHANICAL SYSTEMS VOL.13,NO.5

      Pages: 814-821

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] Novel Silicon On Insulator Metal Oxide Semiconductor Field Effects Transistors with Buried Back Gate2004

    • Author(s)
      Hyuckjae Oh
    • Journal Title

      Japanese Journal of Applied Physics Vol.43,No.4B

      Pages: 2140-2144

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] A Low-Power Edge-Triggered and Logic-Embedded Flip-Flop Using Complementary Pass Transistor Circuit2004

    • Author(s)
      Ki-Tae PARK
    • Journal Title

      IEICE TRANSACTIONS on Electronics/Special Section on Low-Power System LSI, IP and Related Technologies Vol.E87-C No.4

      Pages: 640-644

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] A Power-Down Circuit Scheme Using Data-Preserving Complementary Pass Transistor Flip-Flop for Low-Power High-Performance Multi-Threshold CMOS LSI2004

    • Author(s)
      Ki-Tae PARK
    • Journal Title

      IEICE TRANSACTIONS on Electronics/Special Section on Low-Power System LSI, IP and Related Technologies Vol.E87-C No.4

      Pages: 645-648

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] SiGe elevated source/drain structure and nickel silicide contact layer for sub 0.1 μm MOSFET fabrication2004

    • Author(s)
      JeoungChill Shim
    • Journal Title

      Applied Surface Science Volume 224

      Pages: 260-264

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] Design and evaluation of High Speed Routing Lookup Architecture2004

    • Author(s)
      Jun Zhang
    • Journal Title

      IEICE Transactions on Communications Vol.E87-B, No.3

      Pages: 406-412

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
    • Peer Reviewed
  • [Journal Article] High-Resolution Long-Array Thermal Ink Jet Printhead Fabricated by Anisotropic Wet Etching and Deep Si RIE2004

    • Author(s)
      Regan Nayve
    • Journal Title

      JOURNAL OF MICROELECTRO-MECHANICAL SYSTEMS VOL. 13, NO. 5

      Pages: 814-821

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Journal Article] Novel Silicon On Insulator Metal Oxide Semiconductor Field Effects Transistors with Buried Back Gate2004

    • Author(s)
      Hyuckjae Oh
    • Journal Title

      Japanese Journal of Applied Physics Vol. 43, NO. 4B

      Pages: 2140-2144

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Journal Article] A Low-Power Edge-Triggered and Logic-Embedded Flip-Flop Using Complementary Pass Transistor Circuit2004

    • Author(s)
      Ki-Tae PARK
    • Journal Title

      IEICE TRANSACTIONS on Electronics/Special Section on Low-Power System LSI, IP and Related Technologies Vol. E87-C No. 4

      Pages: 640-644

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Journal Article] A Power-Down Circuit Scheme Using Data-Preserving ComplementaryPass Transistor Flip-Flop for Low-Power High-Performance Multi-Threshold CMOS LSI2004

    • Author(s)
      Ki-Tae PARK
    • Journal Title

      IEICE TRANSACTIONS on Electronics/Special Section on Low-Power System LSI, IP and Related Technologies Vol. E87-C No. 4

      Pages: 645-648

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Journal Article] Design and evaluation of High Speed Routing Lookup Architecture2004

    • Author(s)
      Jun Zhang
    • Journal Title

      IEICE Transactions on Communications Vol. E87-B, No.3

      Pages: 406-412

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Journal Article] Design and Evaluation of a High Speed Routing Lookup Architecture2004

    • Author(s)
      Jun Zhang, JeoungChill Shim, Hiroyuki Kurino, Mitsumasa Koyanagi
    • Journal Title

      IEICE Transactions on Communications E87-B

      Pages: 406-412

    • NAID

      110003222242

    • Related Report
      2004 Annual Research Report
  • [Journal Article] Design of a Novel Real-Shared Memory Module for High Performance Parallel Processor System with Shared Memory2004

    • Author(s)
      Z.Liu, J.Shim, H.Kurino, Mitsumasa Koyanagi
    • Journal Title

      International Conference on Advanced Information Networking and Applications

      Pages: 241-244

    • Related Report
      2004 Annual Research Report
  • [Journal Article] Bump Formation Technique for Multi-Chip Module with Optical Interconnection2004

    • Author(s)
      H.Kurino, R.Nitobe, J.Shim, M.Koyanagi, et al.
    • Journal Title

      The Electrochemical Society International Semiconductor Technology Conference

      Pages: 94-94

    • Related Report
      2004 Annual Research Report
  • [Journal Article] Technology for Three Dimensional Integrated System-on-a-Chip2004

    • Author(s)
      Hiroyuki Kurino, Mitsumasa Koyanagi
    • Journal Title

      Proceedings of 7^<th> International Conference on Solid-State and Integrated Circuits Technology

      Pages: 599-602

    • Related Report
      2004 Annual Research Report
  • [Journal Article] Novel Silicon On Insulator Metal Oxide Semiconductor Field Effect Transistors with Buried Back Gate2004

    • Author(s)
      Hyuckjae Oh, Hoon Choi, Hiroyuki Kurino, Mitsumasa Koyanagi, et al.
    • Journal Title

      Japanese Journal of Applied Physics 43

      Pages: 2140-2144

    • NAID

      10012949608

    • Related Report
      2004 Annual Research Report
  • [Journal Article] Optimization of Vertical Interconnection in 3D LSI Using Wire-Length Distribution2004

    • Author(s)
      T.Nakamura, Y.Yamada, T.Ono, H.Kurino, M.Koyanagi, et al.
    • Journal Title

      Conference Proceedings AMC XIX

      Pages: 35-43

    • Related Report
      2004 Annual Research Report
  • [Journal Article] SiGe elevated source/drain structure and nickel silicide contact layer for sub 0.1μm MOSFET fabrication

    • Author(s)
      JeoungChill Shim
    • Journal Title

      Applied Surface Science Volume 224

      Pages: 260-264

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] 3D system integration technology and 3D systems2008

    • Author(s)
      Takafumi, FUKUSHIMA
    • Organizer
      MAM2008 (Materials for Advanced Metallization Workshop)
    • Place of Presentation
      Dresden, Germany
    • Year and Date
      2008-03-02
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] system integration technology and 3D systems2008

    • Author(s)
      Takafumi, FUKUSHIMA
    • Organizer
      MAM2008(Materials for Advanced Metallization3D Workshop)
    • Place of Presentation
      Dresden, Germany
    • Year and Date
      2008-03-02
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] 自己組織化ウエーハ張り合わせによる三次元集積化技術2008

    • Author(s)
      福島 誉史
    • Organizer
      応用物理学会シリコンテクノロジー分科会多層配線システム研究委員会(共催:電子情報通信学会、シリコン材料・デバイス研究会)(SDM)
    • Place of Presentation
      機械振興会館、東京
    • Year and Date
      2008-02-08
    • Related Report
      2007 Annual Research Report
  • [Presentation] 三次元実装技術2007

    • Author(s)
      福島 誉史
    • Organizer
      エレクトロニクス実装学会/材料技術委員会公開研究会
    • Place of Presentation
      東京、国立オリンピック記念青少年総合センター
    • Year and Date
      2007-11-29
    • Related Report
      2007 Annual Research Report
  • [Presentation] Chip-to-Wafer Stacking for 3D Integration with TSV2007

    • Author(s)
      Takafumi Fukushima
    • Organizer
      1st International IEEE Workshop on Low Temperature Bonding for 3D Integration
    • Place of Presentation
      Tokyo, Univ. of Tokyo
    • Year and Date
      2007-11-09
    • Related Report
      2007 Annual Research Report
  • [Presentation] Chip-to-Wafer Stacking for 3D Integration with TSV2007

    • Author(s)
      Takafumi, FUKUSHIMA
    • Organizer
      IEEE Workshop on Low Temperature Bonding for 3D Integration
    • Place of Presentation
      Tokyo, Univ. of Tokyo
    • Year and Date
      2007-11-08
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Chip-to-Wafer Stacking for 3D Integration with TSV2007

    • Author(s)
      Takafumi, FUKUSHIMA
    • Organizer
      IEEE Workshop on Low Temperature Bonding for 3D Integration
    • Place of Presentation
      Tokyo University of Tokyo
    • Year and Date
      2007-11-08
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Thermal Issues of 3D ICs2007

    • Author(s)
      Takafumi, Fukushima
    • Organizer
      Workshop on Driving the future of interconnect in 3D: Thermal and Design Issues in 3D ICs
    • Place of Presentation
      Albany, USA
    • Year and Date
      2007-10-11
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Thermal Issues of 3D ICs2007

    • Author(s)
      Takafumi Fukushima
    • Organizer
      Workshop on Driving the future of interconnect in 3D: Thermal and Design Issues in 3D ICs
    • Place of Presentation
      Albany, New York, USA
    • Year and Date
      2007-10-11
    • Related Report
      2007 Annual Research Report
  • [Presentation] Three-Dimensional Super-Chip Integration Technology Using a New Self Assembly Technique2007

    • Author(s)
      Mitsumasa, Koyanagi
    • Organizer
      IEEE 3D System Integration Workshop
    • Place of Presentation
      Munich, Germany
    • Year and Date
      2007-10-01
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Three-Dimensional Super-Chip Integration Technology Using a New Self Assembly Technique2007

    • Author(s)
      Mitsumasa Koyanagi
    • Organizer
      IEEE "3D System Integration" Workshop
    • Place of Presentation
      Munich, Germany
    • Year and Date
      2007-10-01
    • Related Report
      2007 Annual Research Report
  • [Presentation] Passive Optical Alignment with High Accuracy for Low-Loss Optical Interposer2007

    • Author(s)
      M. Fujiwara
    • Organizer
      International Conference on Solid State Device and Materials (SSDM)
    • Place of Presentation
      Tsukuba Epochal Tsukuba
    • Year and Date
      2007-09-21
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] New Reconfigurable Memory Architecture for Parallel Image Processing LSI with Three-Dimensional Structure2007

    • Author(s)
      Shigeo Kodama
    • Organizer
      International Conference on Solid State Device and Materials (SSDM)
    • Place of Presentation
      Tsukuba Epochal Tsukuba
    • Year and Date
      2007-09-21
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Passive Optical Alignment with High Accuracy for Low-Loss Optical Interposer2007

    • Author(s)
      M. Fujiwara
    • Organizer
      International Conference on Solid State Device and Materials (SSDM)
    • Place of Presentation
      Tsukuba, Epochal Tsukuba
    • Year and Date
      2007-09-21
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] New Reconfigurable Memory Architecture for Parallel Image Processing LSI with Three-Dimensional Structure2007

    • Author(s)
      Shigeo Kodama
    • Organizer
      International Conference on Solid State Device and Materials (SSDM)
    • Place of Presentation
      Tsukuba, Epochal Tsukuba
    • Year and Date
      2007-09-21
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Tungsten Through-Si Via (TSV) Technology for Three-Dimensional LSIs2007

    • Author(s)
      H. Kikuchi
    • Organizer
      International Conference on Solid State Device and Materials (SSDM)
    • Place of Presentation
      Tsukuba, Epochal Tsukuba
    • Year and Date
      2007-09-20
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] 3D Integration Technology Based on Chip-to-Wafer Bonding with Through-Si Vias (TSV)2007

    • Author(s)
      Takafumi, Fukushima
    • Organizer
      3D Integration by Low-temperature Bonding Technology
    • Place of Presentation
      Tokyo, Univ. of Tokyo
    • Year and Date
      2007-09-18
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] 3D Integration Technology Based on Chip-to-Water Bonding with Through-Si Vias (TSV)2007

    • Author(s)
      Takafumi, Fukushima
    • Organizer
      3D Integration by Low-temperature Bonding Technology
    • Place of Presentation
      Tokyo, University of Tokyo
    • Year and Date
      2007-09-18
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] 3D Integration Technology Based on Chip-to-Wafer Bonding with Through-Si Vias(TSV)2007

    • Author(s)
      Takafumi Fukushima
    • Organizer
      2nd 3DIntegration by Low-temperature Bonding Technology
    • Place of Presentation
      Tokyo, Univ. of Tokyo
    • Year and Date
      2007-09-18
    • Related Report
      2007 Annual Research Report
  • [Presentation] Self-Assembly Process for Chip-to-Wafer Three-Dimensional Integration2007

    • Author(s)
      Takafumi Fukushima
    • Organizer
      The 57th Electronic Components and Technology Conference(ECTC)
    • Place of Presentation
      Reno, Nevada, USA
    • Year and Date
      2007-05-31
    • Related Report
      2007 Annual Research Report
  • [Presentation] Self-Assembly Process for Chip-to-Wafer Three-Dimensional Integration2007

    • Author(s)
      Takafumi, Fukushima
    • Organizer
      Electronic Components and Technology Conference (ECTC)
    • Place of Presentation
      Reno, USA
    • Year and Date
      2007-05-28
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Self-Assembly Process for Chip-to-Water Three-Dimensional Integration2007

    • Author(s)
      Takafumi, Fukushima
    • Organizer
      Electronic Components and Technooogy Conference (ECTC)
    • Place of Presentation
      Reno, USA
    • Year and Date
      2007-05-28
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] New Three-Dimensional Integration Technologies Based on Wafer-to-Wafer and Chip-to-Wafer Bonding Methods2007

    • Author(s)
      Mitsumasa, Koyanagi
    • Organizer
      IEEE International Solid State Circuits Conference (ISSCC) Forum
    • Place of Presentation
      San Francisco, USA,
    • Year and Date
      2007-02-11
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] New Three-Dimensional Integration Technologies Based on Wafer-to-Wafer and Chip-to-Wafer Bonding Methods2007

    • Author(s)
      Mitsumasa, Koyanagi
    • Organizer
      IEEE International Solid State Circuits Conference (ISSCC) Forum
    • Place of Presentation
      San Francisco, USA
    • Year and Date
      2007-02-11
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] High performance polynorbornene optical waveguide for Opto-electric interconnections2007

    • Author(s)
      M. fujiwara
    • Organizer
      Polytronic 2007 International IEEE Conference on Polymer and Adhesives in Microelectronics and Photonics
    • Place of Presentation
      Tokyo, Miraikan Hall
    • Year and Date
      2007-01-17
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] High performance polynorbornene optical waveguide for Opto-electric interconnections2007

    • Author(s)
      M. Fujiwara
    • Organizer
      Polytronic 2007 International IEEE Conference on Polymer and Adhesives in Microelectronics and Photonics
    • Place of Presentation
      Tokyo Miraikan Hall
    • Year and Date
      2007-01-17
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] New Reconfigurable Memory Architecture for Parallel Image Processing LSI with Three-Dimensional Structure2007

    • Author(s)
      Shigeo Kodama
    • Organizer
      The 2007 International Conference on Solid State Device and Materials
    • Place of Presentation
      Tsukuba
    • Related Report
      2007 Annual Research Report
  • [Presentation] Passive Optical Alignment with High Accuracy for Low-Loss Optical Interposer2007

    • Author(s)
      Makoto Fujiwara
    • Organizer
      The 2007 International Conference on Solid State Device and Materials
    • Place of Presentation
      Tsukuba
    • Related Report
      2007 Annual Research Report
  • [Presentation] Tungsten Through-Si Via(TSV)Technology for Three-Dimensional LSIs2007

    • Author(s)
      Hirokazu Kikuchi
    • Organizer
      The 2007 International Conference on Solid State Device and Materials
    • Place of Presentation
      Tsukuba
    • Related Report
      2007 Annual Research Report
  • [Presentation] New three-dimensional integration technology to achieve a super chip2006

    • Author(s)
      Mitsumasa, Koyanagi
    • Organizer
      International Conference on Solid-State and Integrated-Circuit Technology ICSIST-2006
    • Place of Presentation
      Shanghai, China
    • Year and Date
      2006-10-24
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] New three-dimensional integration technology to achieve a super chip2006

    • Author(s)
      Mitsumasa, Koyanagi
    • Organizer
      International Conference on Solid-State and Integrated-Circuit Technology ICSIT-2006
    • Place of Presentation
      Shanghai, China
    • Year and Date
      2006-10-24
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Super Chip Integration Based on Chip-to-Wafer 3D Integration Technology2006

    • Author(s)
      Tetsu, Tanaka
    • Organizer
      The International Symposium on Microelectronics and Packaging (ISMP 2006)
    • Place of Presentation
      Seoul, Korea
    • Year and Date
      2006-10-11
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Development of a High Speed Vision System for Mobile Robots2006

    • Author(s)
      Atsushi Konno
    • Organizer
      Proceedings IEEE/RSJ International Conference on Intelligent Robots and Systems
    • Place of Presentation
      Beijing, China
    • Year and Date
      2006-10-11
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Novel Opto-Electro Printed Circuit Board with Polynorbornene Optical Waveguide2006

    • Author(s)
      M. Fujiwara
    • Organizer
      International Conference on Solid State Devices and Materials (SSDM)
    • Place of Presentation
      Yokohama Pacifico Yokohama
    • Year and Date
      2006-09-15
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Novel Opto-Electro Printed Circuit Board with Polynorbornene Optical Waveguide2006

    • Author(s)
      M. Fujiwara
    • Organizer
      International Conference on Solid State Devices and Materials (SSDM)
    • Place of Presentation
      Yokohama, Pacifico Yokohama
    • Year and Date
      2006-09-15
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Sub-Atmospheric Chemical Vapor Deposition Process for Chip-to-Wafer 3-Dimensional Integration2006

    • Author(s)
      Hirokazu, Kikuchi
    • Organizer
      International Conference on Solid State Devices and Materials (SSDM)
    • Place of Presentation
      Yokohama Pacifico Yokohama
    • Year and Date
      2006-09-14
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Sub-Atmospheric Chemical Vapor Deposition Process for Chip-to-Wafer 3-Dimensional Intergration2006

    • Author(s)
      Hirokazu, Kikuchi
    • Organizer
      International Conference on Solid State Devices and Materials (SSDM)
    • Place of Presentation
      Yokohama, Pacifico Yokohama
    • Year and Date
      2006-09-14
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Ultimate Super-Chip Integration Based on Chip-to-Wafer Three-Dimensional Integration Technology2006

    • Author(s)
      Takafumi, Fukushima
    • Organizer
      International Conference on Electronics Packaging (ICEP)
    • Place of Presentation
      Tokyo Shinagawa Prince Hotel
    • Year and Date
      2006-04-20
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Ultimate Super-Chip Integration Based on Chip-to-Wafer Three-Dimensional Integration Technology2006

    • Author(s)
      Takafumi, Fukushima
    • Organizer
      International Conference on Electronics Packaging (ICEP)
    • Place of Presentation
      Tokyo Sinagawa Prince Hotel
    • Year and Date
      2006-04-20
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Semiconductor-on-Low-K Substrate Technology2006

    • Author(s)
      Tetsu, Tanaka
    • Organizer
      The Electrochemical Society International Semiconductor Technology Conference (ISTC2006)
    • Place of Presentation
      Shanghai, China
    • Year and Date
      2006-03-11
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] A New Smart-Stack Technology for Three-Dimensional LSI2005

    • Author(s)
      Mitsumasa, Koyanagi
    • Organizer
      Advanced Metallization Conference 2005
    • Place of Presentation
      Tokyo, Univ. of Tokyo
    • Year and Date
      2005-10-13
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] A New Smart-Stack Technology for Three-Dimensional LSI2005

    • Author(s)
      Mitsumasa, Koyanagi
    • Organizer
      Advanced Metallization Conference 2005
    • Place of Presentation
      Tokyo, University of Tokyo
    • Year and Date
      2005-10-13
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] A New Smart Stacking Technology for 3D-LSIs2005

    • Author(s)
      Mitsumasa, Koyanagi
    • Organizer
      the International Symposium on Microelectronics and Packaging <ISMP 2005>
    • Place of Presentation
      Seoul, Korea
    • Year and Date
      2005-09-28
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] A New Smart Stacking Technology for 3D-LSIs2005

    • Author(s)
      Mitsumasa, Koyanagi
    • Organizer
      The International Symposium on Microelectronics and Packaging (ISMP 2005)
    • Place of Presentation
      Seoul, Korea
    • Year and Date
      2005-09-28
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] A New Super Smart Stack Technology for 3D LSIs2005

    • Author(s)
      Mitsumasa, Koyanagi
    • Organizer
      3D Architectures for Semiconductor Integration and Packaging
    • Place of Presentation
      Arizona, USA
    • Year and Date
      2005-09-15
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Multi-Chip Shared-Memory Module with Optical Interconnection for Parallel Processor system2005

    • Author(s)
      Hirofumi Kuribara
    • Organizer
      International Conference on Solid State Device and Materials <SSDM>
    • Place of Presentation
      Kobe, International Conference Center
    • Year and Date
      2005-09-14
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Influences of Ion Implantation Damages on Elevated Source/Drain Formation for Ultra-Thin Body SOI MOSFET2005

    • Author(s)
      H. J. Oh
    • Organizer
      International Conference on Solid State Device and Materials <SSDM>
    • Place of Presentation
      Kobe, International Conference Center
    • Year and Date
      2005-09-14
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Deep Trench Etching for Chip-to-Chip Three-Dimensional Integration2005

    • Author(s)
      Hirokazu Kikuchi
    • Organizer
      International Conference on Solid State Device and Materials <SSDM>
    • Place of Presentation
      Kobe, International Conference Center
    • Year and Date
      2005-09-14
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Estimation of Wire Length Distribution for Evaluating Performance Improvement of Three-Dimensional LSI2005

    • Author(s)
      Jun Deguchi
    • Organizer
      International Conference on Solid State Device and Materials <SSDM>
    • Place of Presentation
      Kobe, International Conference Center
    • Year and Date
      2005-09-14
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Multi-Chip Shared-Memory Module with Optical Interconnection for Parallel Processor System2005

    • Author(s)
      Hirofumi Kuribara
    • Organizer
      International Conference on Solid State Device and Materials (SSDM)
    • Place of Presentation
      Kobe, International Conference Center
    • Year and Date
      2005-09-14
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Influences of Lon Implantation Damages on Elevated Source/Drain Formation for Ultra-Thin Body SOI MOSFET2005

    • Author(s)
      H. J. Oh
    • Organizer
      International Conference on Solid State Device and Materials (SSDM)
    • Place of Presentation
      Kobe, International Conference Center
    • Year and Date
      2005-09-14
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Deep Trench Etching for Chip-to-Chip Three-Dimensional Integration2005

    • Author(s)
      Hirokazu Kikuchi
    • Organizer
      International Conference on Solid State Device and Materials (SSDM)
    • Place of Presentation
      Kobe, International Conference Center
    • Year and Date
      2005-09-14
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Estimation of Wire Length Distribution for Evaluating Performance Improvement of Three-Dimensional LSI2005

    • Author(s)
      Jun Deguchi
    • Organizer
      International Conference on Solid State Device and Materials (SSDM)
    • Place of Presentation
      Kobe, International Conference Center
    • Year and Date
      2005-09-14
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] New Three-Dimensional Integration Technology Using Chip-to-Wafer Bonding to Achieve Ultimate Super Chip Integration2005

    • Author(s)
      Takafumi Fukushima,
    • Organizer
      International Conference on Solid State Device and Materials <SSDM>
    • Place of Presentation
      Kobe, International Conference Center
    • Year and Date
      2005-09-13
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Characteristics of Silicon-on-Low-K Insulator <SOLK> MOSFET with Metal Back-Gate2005

    • Author(s)
      Y. Yamada
    • Organizer
      International Conference on Solid State Device and Materials <SSDM>
    • Place of Presentation
      Kobe, International Conference Center
    • Year and Date
      2005-09-13
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] New Three-Dimensional Integration Technology Using Chip-to-Wafer Bonding to Achieve Ultimate Super Chip Integration2005

    • Author(s)
      Takafumi Fukushima
    • Organizer
      International Conference on Solid State Device and Materials (SSDM)
    • Place of Presentation
      Kobe, International Conference Center
    • Year and Date
      2005-09-13
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Characteristics of Silicon-on-Low-K Insulator (SOLK) MOSFET with Metal Back-Gate2005

    • Author(s)
      Y. Yamada
    • Organizer
      International Conference on Solid State Device and Materials (SSDM)
    • Place of Presentation
      Kobe, International Conference Center
    • Year and Date
      2005-09-13
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Three Dimensional Integration2005

    • Author(s)
      Mitsumasa, Koyanagi
    • Organizer
      Stanford University CIS AdCom Meeting
    • Place of Presentation
      San Francisco, USA
    • Year and Date
      2005-05-10
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Different Approaches to 3D Chips2005

    • Author(s)
      Mitsumasa, Koyanagi
    • Organizer
      Stanford University Seminar
    • Place of Presentation
      San Francisco, USA
    • Year and Date
      2005-05-09
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Dynamical Multi-Context Reconfiguration Scheme for Reconfigurable Parallel Image Processing System with Three Dimensional Structure2005

    • Author(s)
      Takeaki Sugimura
    • Organizer
      ARCS '05 (Architecture of Computing Systems) Workshop
    • Place of Presentation
      Innsbruck, Austria
    • Year and Date
      2005-03-15
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Dynamical Multi-Context Reconfiguration Scheme for Reconfigurable Parallel Image Processing System with Three Dimensional Structure2005

    • Author(s)
      Takeaki Sugimura
    • Organizer
      ARCS ''05 (Architecture of Computing Systems) Workshop
    • Place of Presentation
      Innsbruck, Austria
    • Year and Date
      2005-03-15
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Design and Evaluation of a Real Novel-Shared Cache Module for Parallel processor Chip2004

    • Author(s)
      Zhe Liu
    • Organizer
      International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT2004)
    • Place of Presentation
      Singapore
    • Year and Date
      2004-12-09
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Design and Evaluation of a Real Novel-Shared Cache Module for Parallel processor Chip2004

    • Author(s)
      Zhe Liu
    • Organizer
      International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT 2004)
    • Place of Presentation
      Singapore
    • Year and Date
      2004-12-09
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] New devices for communication system in Si chips2004

    • Author(s)
      Mitsumasa, Koyanagi
    • Organizer
      International Symposium on Advanced Science and Technology of Silicon Materials (JSPS Si Symposium)
    • Place of Presentation
      Hawaii, USA
    • Year and Date
      2004-11-23
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] New devices for communication system in Si chips2004

    • Author(s)
      Mitsumas, Koyanagi
    • Organizer
      International Symposium on Advanced Science and Technology of Silicon Materials (JSPS Si Symposium
    • Place of Presentation
      Hawaii, USA
    • Year and Date
      2004-11-23
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Technology for Three Dimensional Integrated System-on-a Chip2004

    • Author(s)
      Hiroyuki, Kurino and Mitsumasa Koyanagi
    • Organizer
      Proceedings of International Conference on Solid-State and Integrated Circuits Technology (ICSICT)
    • Place of Presentation
      Beijing, China
    • Year and Date
      2004-10-21
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Technology for Three Dimensional Integrated System-on-a Chip2004

    • Author(s)
      Hiroyuki, Kurino and Mitsumasa Koyanagi
    • Organizer
      Proceedings of International Conference on Solid-State and Integrated Circuits Technology (ICSECT)
    • Place of Presentation
      Beijing, China
    • Year and Date
      2004-10-21
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Ultra shallow Junction with Elevated SiGe Source/Drain Formed by Laser Induced Atomic Layer Doping2004

    • Author(s)
      J. C. Bea
    • Organizer
      International Workshop on NEW GROUP IV (Si-Ge-C) SEMICONDUCTORS
    • Place of Presentation
      Sendai, Tohoku University
    • Year and Date
      2004-10-13
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Nickel Silicide Formation of SiGe Selectively Epitaxial Growth Layer on Silicon On Insulator2004

    • Author(s)
      Takeshi Sakaguchi
    • Organizer
      International Workshop on NEW GROUP IV (Si-Ge-C) SEMICONDUCTOR
    • Place of Presentation
      Sendai, Tohoku University
    • Year and Date
      2004-10-13
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Novel SOI MOSFETs with Buried Back Gate Control2004

    • Author(s)
      Hoon Choi
    • Organizer
      International Workshop on NEW GROUP IV (Si-Ge-C) SEMICONDUCTOR
    • Place of Presentation
      Sendai, Tohoku University
    • Year and Date
      2004-10-13
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Ultra shallow Junction with Elevated SiGe Source/Drain Formed by Laser Induced Atomic Layer Doping2004

    • Author(s)
      J. C. Bea
    • Organizer
      International Workshop on NEW GROUP IV(Si-Ge-C) SEMICONDUCTORS
    • Place of Presentation
      Sendai, Tohoku University
    • Year and Date
      2004-10-13
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Nickel Silicide Formation of SiGe Selectively Epitaxial Growth Layer on Silicon On Insulator2004

    • Author(s)
      Takeshi Sakaguchi
    • Organizer
      International Workshop on NEW GROUP IV(Si-Ge-C) SEMICONDUCTORS
    • Place of Presentation
      Sendai, Tohoku University
    • Year and Date
      2004-10-13
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Novel SOI MOSFETs with Buried Back Gate Control2004

    • Author(s)
      Hoon Choi
    • Organizer
      International Workshop on NEW GROUP IV(Si-Ge-C) SEMICONDUCTORS
    • Place of Presentation
      Sendai, Tohoku unviersity
    • Year and Date
      2004-10-13
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Wafer Level Three Dimensional LSI Technology2004

    • Author(s)
      Hiroyuki, Kurino and Mitsumasa Koyanagi
    • Organizer
      Proceedings International VLSI Multilevel Interconnection Conference (VMIC)
    • Place of Presentation
      Hawaii, USA
    • Year and Date
      2004-09-30
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Deep Si Hole Etching Technique for Super Chip Integration2004

    • Author(s)
      H. Kurino
    • Organizer
      Electrochemical Society International Semiconductor Technology Conference (ISTC2004)
    • Place of Presentation
      Shanghai, China
    • Year and Date
      2004-09-17
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Ultrathin-SOI PMOSFET with Elevated S/D and buried back gate2004

    • Author(s)
      Hyuckjae Oh
    • Organizer
      Electrochemical Society International Semiconductor Technology Conference, (ISTC2004)
    • Place of Presentation
      Shanghai, China
    • Year and Date
      2004-09-17
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Ultrathin-SOI PMOSFET with Elevated S/D and buried back gate2004

    • Author(s)
      Hyuckjae Oh
    • Organizer
      Electrochemical Society International Semiconductor Technology Conference (ISTC2004)
    • Place of Presentation
      Shanghai, China
    • Year and Date
      2004-09-17
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Bump Formation Technique for Multi-Chip Module with Optical Interconnection2004

    • Author(s)
      H. Kurino
    • Organizer
      Electrochemical Society International Semiconductor Technology Conference (ISTC2004)
    • Place of Presentation
      Shanghai, China
    • Year and Date
      2004-09-16
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Design of a Novel Real-Shared Memory Module for High Performance Parallel Processor System with Shared Memory2004

    • Author(s)
      Z. Liu
    • Organizer
      International Conference on Advanced Information Networking and Applications (AINA 2004)
    • Place of Presentation
      Fukuoka Fukuoka Institute Technology
    • Year and Date
      2004-03-29
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Parallel Image Processing Field Programmable Gate Array for Real Time Image Processing System2003

    • Author(s)
      Takeaki Sugimura
    • Organizer
      IEEE International Conference on Field-Programmable Technology (FPT)
    • Place of Presentation
      Tokyo, Univ. of Tokyo
    • Year and Date
      2003-12-16
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Parallel Image Processing Field Programmable Gate Array for Real Time Image Processing System2003

    • Author(s)
      Takeaki Sugimura
    • Organizer
      IEEE International Conference on Field-Program mable Technology (FPT)
    • Place of Presentation
      Tokyo, University of Tokyo
    • Year and Date
      2003-12-16
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Three-Dimensional Integration Technology by Wafer-to-Wafer and Chip-to-Wafer Stacking Chip2003

    • Author(s)
      Mitsumasa, Koyanagi
    • Organizer
      3D System Integration Workshop
    • Place of Presentation
      Munich, Germany
    • Year and Date
      2003-12-15
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Optimization of Vertical Interconnection in 3D LSI Using Wire-Length Distribution2003

    • Author(s)
      T. Nakamura
    • Organizer
      Advanced Metallization Conference 2003(AMC)
    • Place of Presentation
      Montreal, Canada
    • Year and Date
      2003-10-22
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Optimization of Vertical Interconnection in 3D LSI using Wire-Length Distribution2003

    • Author(s)
      T. Nakamura
    • Organizer
      Advanced Metallization Conference 2003 (AMC)
    • Place of Presentation
      Montreal, Canada
    • Year and Date
      2003-10-22
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Optimization of Vertical Interconnection in 3D LSI Using Wire-Length Distribution2003

    • Author(s)
      T. Nakamura
    • Organizer
      Advanced Metallization Conference 2003 Asian Session
    • Place of Presentation
      Tokyo, Univ. of Tokyo
    • Year and Date
      2003-10-01
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Optimization of Vertical Interconnection in 3D LSI Using Wire-Length Distribution2003

    • Author(s)
      T. Nakamura
    • Organizer
      Advanced Metallization Conference 2003 Asian Session
    • Place of Presentation
      Tokyo, University of Tokyo
    • Year and Date
      2003-10-01
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Novel SOI MOSFETs with Buried Back-Gate2003

    • Author(s)
      Hyuckjae Oh
    • Organizer
      International Conference on Solid State Devices and Materials (SSDM)
    • Place of Presentation
      Tokyo, Keio Plaza Hotel
    • Year and Date
      2003-09-17
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] Novel SOI MOSFETs with Buried Back-Gate2003

    • Author(s)
      Hyuckjae Oh
    • Organizer
      International Conference on Solid State Deveces and Materials (SSDM)
    • Place of Presentation
      Tokyo, Keio Plaza Hotel
    • Year and Date
      2003-09-17
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] A New Pipelined Architecture for High Speed IP Routing Lookup2003

    • Author(s)
      Jun Zhang
    • Organizer
      Forum on Information Technology 2003 (FIT 2003)
    • Place of Presentation
      Sapporo, Sapporo-gakuin Univ.
    • Year and Date
      2003-09-11
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Presentation] A New Pipelined Architecture for High Speed IP Routing Lookup2003

    • Author(s)
      Jun Zhang
    • Organizer
      Forum on Information Technology2003(FIT2003)
    • Place of Presentation
      Sapporo, Sapporo Gakuin University
    • Year and Date
      2003-09-11
    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Book] 「最先端半導体パッケージ技術のすべて(分担執筆)」2007

    • Author(s)
      小柳 光正
    • Publisher
      工業調査会
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Book] 「新改版 表面科学の基礎と応用(分担執筆)」2004

    • Author(s)
      小柳 光正
    • Publisher
      NTS出版
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Remarks]

    • URL

      http://www.sd.mech.tohoku.ac.jp/

    • Related Report
      2007 Annual Research Report
  • [Patent(Industrial Property Rights)] 三次元積層構造を持つ集積回路装置の製造方法2005

    • Inventor(s)
      小柳光正
    • Industrial Property Rights Holder
      株式会社ザイキューブ
    • Industrial Property Number
      2005-259824
    • Filing Date
      2005-09-07
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Patent(Industrial Property Rights)] 三次元積層構造を持つ半導体装置及びその製造方法2004

    • Inventor(s)
      小柳光正
    • Industrial Property Rights Holder
      株式会社ザイキューブ
    • Industrial Property Number
      2004-166821
    • Filing Date
      2004-06-04
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Patent(Industrial Property Rights)] 三次元積層構造を持つ半導体装置の製造方法2004

    • Inventor(s)
      小柳光正
    • Industrial Property Rights Holder
      株式会社ザイキューブ
    • Industrial Property Number
      2004-240944
    • Filing Date
      2004-08-20
    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2007 Final Research Report Summary
  • [Publications] 栗野浩之, 小柳光正: "FD-SOIMOSFETのためのソース/ドレイン構造"応用物理学会分科会 シリコンテクノロジー. 51. 22-55 (2003)

    • Related Report
      2003 Annual Research Report
  • [Publications] JeoungChill Shim, HyucJae Oh, Hoon Choi, Mitsumasa Koyanagi, et al.: "SiGe Elevated Source/Drain Structure an Nickel Silicide Contact Layer for sub 0.1 MOS-FET Fabrication"First International SiGe Technology an Device Meeting (ISTDM). 23-24 (2003)

    • Related Report
      2003 Annual Research Report
  • [Publications] Hyuckae Oh, Hoon Choi, Takeshi Sakaguchi, Mitsumasa Koyanagi, et al.: "Novel SOI MOSFETs with Buried Back-Gate"Extended Abstracts of the 2003 International Conference on Solid State Devices and Materials (SSDM). 274-275 (2003)

    • Related Report
      2003 Annual Research Report
  • [Publications] Jun Deguchi, Taiichiro Watanabe, Mitumasa Koyanagi, et al.: "Three-Dimensionally Stacked Analog Retinal Prosthesis Chip"Extended Abstracts of the 2003 International Conference on Solid State Devices and Materials (SSDM). 402-403 (2003)

    • Related Report
      2003 Annual Research Report
  • [Publications] Jun Zhang, JeoungChill Shim, Hiroyuki Kurino, Mitsumasa Koyanagi: "A New Pipelined Architecture for High Speed IP Routing Lookup"FIT情報科学フォーラム2003. 367-368 (2003)

    • Related Report
      2003 Annual Research Report
  • [Publications] T.Nakamura, Y.Yamada, T.Ono, H.Kurino, M.Koyanagi: "Optimization of Vertical Interconnection in 3D LSI Using Wire-Length Distribution"Advanced Metalizatlon Conference 2003 : Asian Session. 58-59 (2003)

    • Related Report
      2003 Annual Research Report

URL: 

Published: 2003-04-01   Modified: 2016-04-21  

Information User Guide FAQ News Terms of Use Attribution of KAKENHI

Powered by NII kakenhi