| Project/Area Number |
15300010
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Computer system/Network
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| Research Institution | HOKKAIDO UNIVERSITY |
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Principal Investigator |
MIYANAGA Yoshikazu Hokkaido Univ., Grad. School of Info. Science and Tech., Plof., 大学院情報科学研究科, 教授 (20166185)
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| Project Period (FY) |
2003 – 2006
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| Project Status |
Completed (Fiscal Year 2006)
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| Budget Amount *help |
¥16,300,000 (Direct Cost: ¥16,300,000)
Fiscal Year 2006: ¥5,800,000 (Direct Cost: ¥5,800,000)
Fiscal Year 2005: ¥5,700,000 (Direct Cost: ¥5,700,000)
Fiscal Year 2004: ¥2,400,000 (Direct Cost: ¥2,400,000)
Fiscal Year 2003: ¥2,400,000 (Direct Cost: ¥2,400,000)
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| Keywords | Speech Recognition / Noise Robust Processing / Running Spectrum / Parallel / Pipeline LSI / Low-Power LSI / FPGA System / Real Time Speech Recognition / Mobile Human Interface |
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| Research Abstract |
In this study, the new algorithm of noise robust speech recognition and its real-time LSI system with low po wer consumption have been developed. These techniques are used under actual environment and useful for mobile human interface. As to the algorithm development, general purpose robust speech recognition system has been proposed. Using this method, about 98% recognition correctness at best performance and 60% correctness at average performance can be obtained for unspecific male and female over 0 dB SNR environments.
As to LSI design, super-parallel and super-pipeline processing LSI for robust automatic speech recognition (ASR) has been designed and realized. The technology of LSI is 0.25micron and its power consumption can be reduced 1/5 than DSP based same ASR system. In addition to this design, the total system, i.e., the full ASR system board including this LSI has also been designed. It has microphone IO, analog amplifier and digital ASR system. The high performance of robust speech recognition can be obtained in the real fields.
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