| Project/Area Number |
15360185
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Electron device/Electronic equipment
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| Research Institution | Tokyo Institute of Technology |
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Principal Investigator |
YAMADA Akira Tokyo Institute of Technology, Quantum Nanoelectronics Research Center, Associate Professor, 量子ナノエレクトロニクス研究センター, 助教授 (40220363)
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| Project Period (FY) |
2003 – 2005
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| Project Status |
Completed (Fiscal Year 2005)
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| Budget Amount *help |
¥11,100,000 (Direct Cost: ¥11,100,000)
Fiscal Year 2005: ¥2,200,000 (Direct Cost: ¥2,200,000)
Fiscal Year 2004: ¥2,400,000 (Direct Cost: ¥2,400,000)
Fiscal Year 2003: ¥6,500,000 (Direct Cost: ¥6,500,000)
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| Keywords | strained Si_<1-y>C_y / gas source MBE / Si MOSFET / vertical MOSFET / ホットワイヤーセル法 / 熱的安定性 |
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| Research Abstract |
Strained Si technology with group IV semiconductor alloys has been widely researched as a promising technique for the improvement of the performance of Si-based MOSFETs because of enhancement of carrier mobility compared with bulk Si. We have focused on strained Si/strain-relaxed Si_<1-y>C_y structures which are applicable to the devices with a new structure such as a vertical MOSFETs. In this structure, a strained Si layer grown on the strain-relaxed Si_<1-y>C_Y layer has compressive strain in the in-plane direction and an enhancement of carrier mobility in the vertical direction is expected. In order to realize this structure, growth of the relaxed Si_<1-y>C_y layer on Si is important.
In our work, we grew a single Si_<1-y>C_y layer with a constant carbon composition on a Si buffer and widely studied the strain relaxation mechanism by varying its thickness. From the experiments, it was found that the relaxation ratio of the Si_<1-y>C_y layer increased with increasing the thickness and
… More
that the ratio of 40% was achieved by using a Si_<99.0>C_<1.0> layer with a thickness of 1800 nm. However, a cross sectional transmission electron microscopy (TEM) observation revealed that there were many stacking faults and twin defects in the films. The defects from the Si_<1-y>C_y layer into the strained Si hindered good crystal growth of the strained Si layer. In contrast, the compositionally graded Si_<1-x>Ge_x layers have been widely used as a buffer of the strain-relaxed Si_<1-x>Ge_x structures. The step-graded Si_<1-x>Ge_x buffer layers are also resulted in high quality films because dislocation nucleation occurs at low strain.
Therefore, in this project, we have newly deposited the stacked Si_<1-y>C_y layers with step-graded carbon compositions (step-graded Si_<1-y>C_y structure) to grow strain-relaxed Si_<1-y>C_y films and investigated lattice dynamics of the structure. The Si and Si_<1-y>C_y films were deposited by a gas-source MBE system using Si_2H_6 and SiH_3CH_3 gases. The substitutional carbon contents and the lattice parameters of Si_<1-y>C_y were evaluated by high resolution X-ray diffractometry. X-ray reciprocal lattice space mappings showed that the relaxation ratio of the each layer increased from the bottom to the top layers in the step-graded Si_<1-y>C_y structures, implying different relaxation mechanisms from step-graded Si_<1-x>Ge_x structures. By using the step-graded Si_<1-y>C_y structure, we have successfully achieved higher relaxation ratios compared with a single Si_<1-y>C_y buffer structure with a constant carbon composition. When the total film thickness was 1000 nm, a Si_<99.0>C_<1.0> buffer layer showed the relaxation ratio of 15%, while the top Si_<98.9>C_<1.1> layer of the step-graded Si_<1-y>C_y structure showed the relaxation ratio of 60%. From these results, it was concluded that step-graded Si_<1-y>C_y structures were important to realize strained Si/strain-relaxed Si_<1-y>C_y structures which are applicable to the vertical MOSFETs. Less
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