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A study of a method to improve the productivity of mixed semiconductor manufacturing

Research Project

Project/Area Number 15560350
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeSingle-year Grants
Section一般
Research Field System engineering
Research InstitutionUniversity of Aizu

Principal Investigator

SAITO Kazuyuki  University of Aizu, School of Computer Science and Technology, Professor, コンピュータ理工学部, 教授 (60254083)

Project Period (FY) 2003 – 2004
Project Status Completed (Fiscal Year 2004)
Budget Amount *help
¥1,700,000 (Direct Cost: ¥1,700,000)
Fiscal Year 2004: ¥800,000 (Direct Cost: ¥800,000)
Fiscal Year 2003: ¥900,000 (Direct Cost: ¥900,000)
KeywordsSemiconductor Manufacturing / Resource Planning / Dispatch / Simulation / Petri Net / Response Time / Adjustment / 半導体製造技術 / 多品種生産 / 優先度割付け法 / スループット
Research Abstract

I performed this project from fo11owing two view points; a research on a dispatching algorithm, and a research on a development of a manufacturing simulator.
A new dispatching algorithm for dynamic allocation of Work-In-Process (WIP) named Pseudo Periodical Priority Dispatching (P3D) is proposed. Performance parameters, adjustment rate, throughput, response time and tardiness, when applying P3D are studied and compared with the results of FCFS and SPT by simulations assuming a Poisson arrival. The adjustment rate is the minimum is P3D. P3D is effective both in the bottleneck modeled processing step and in the non-bottleneck modeled processing step. Especially in the bottleneck modeled processing step, although the average response time of SPT is minimum, that for P3D is about 65% of that for FCFS and the tardiness for P3D is about 28% of that for SPT. Then P3D is confirmed that the fair dispatching is achieved. Finally the author concluded that P3D is an effective dispatching algorithm in the case of the broad product-mix.
The manufacturing simulator is developed based on a color Petri Net theory. The semiconductor manufacturing system can be described by a loop-type net, although the system has more than 300 processing steps. However, new mechanisms are required for describing the semiconductor manufacturing system. A new attributes shall be defined for the tokens corresponding to the processing step, and attribute for the transition shall be defined by referring the sequence table for the LSI fabrication. Also I have proposed some new component for the Petri Net to describe the system easily.
The evaluation in the actual semiconductor facilities will be the future subject of this research.

Report

(3 results)
  • 2004 Annual Research Report   Final Research Report Summary
  • 2003 Annual Research Report
  • Research Products

    (14 results)

All 2005 2004 2003 Other

All Journal Article (12 results) Publications (2 results)

  • [Journal Article] Modification of Color Petri Nets for modeling and designing Semiconductor Manufacturing Systems2005

    • Author(s)
      Hiroaki Iwao
    • Journal Title

      The master thesis, The Univ. of Aizu

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Modification of Color Petri Nets for modeling and designing Semiconductor Manufacturing System2005

    • Author(s)
      Hiroaki Iwao
    • Journal Title

      The Master Thesis, The Univ. of Aizu

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Modification of Color Petri Nets for modeling and designing Semiconductor Manufacturing Systems2005

    • Author(s)
      Hiroaki Iwao
    • Journal Title

      The Master Thesis, The Univ.of Aizu

    • Related Report
      2004 Annual Research Report
  • [Journal Article] Minimization of Adjustment Frequency to achieve Low-Cost Fabrication2004

    • Author(s)
      K.Saito, M.Nagashima
    • Journal Title

      Technical Report, The Univ. of Aizu 2004-2-001

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] 半導体システムのカラーペトリネット記述の簡素化2004

    • Author(s)
      岩尾浩晃, 齋藤和之
    • Journal Title

      計測自動制御学会東北支部 第219回研究集会資料 219-1

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Minimization of Adjustment Frequency to Achieve Low-Cost Fabrication2004

    • Author(s)
      K.Saito, M.Nagashima
    • Journal Title

      Technical Report, The Univ. of Aizu

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] Simplification of Color Petri Net modeling for The Semiconductor Manufacturing System2004

    • Author(s)
      H.Iwao, K.Saito
    • Journal Title

      SICE Tohoku, 219^<th> Research Meeting

      Pages: 219-1

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] 半導体システムのカラーペトリネット記述の簡素化2004

    • Author(s)
      岩尾浩晃, 齋藤和之
    • Journal Title

      計測自動制御学会東北支部第219回研究集会資料 219-1

    • Related Report
      2004 Annual Research Report
  • [Journal Article] A Novel Dispatch Algorithm Reducing Adjustement Rate in A Product-mix2003

    • Author(s)
      K.Saito, S.Ariam
    • Journal Title

      Proc. 2003 IEEE Intern.Symp.Semicon.Manufact.(ISSM)

      Pages: 285-288

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] A Novel Dispatch Algorithm Reducing Adjustement Rate in A Product-mix2003

    • Author(s)
      齋藤和之
    • Journal Title

      ISSM2003日本特別報告会

    • Description
      「研究成果報告書概要(和文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] A Novel Dispatch Algorithm reducing Adjustment Rate in a Product-mix2003

    • Author(s)
      K.Saito, S.Arima
    • Journal Title

      Proc. 2003 IEEE Intern. Semicon. Manufact., ISSM2003

      Pages: 285-288

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Journal Article] A Novel Dispatch Algorithm reducing Adjustment Rate in a Product-mix2003

    • Author(s)
      K.Saito
    • Journal Title

      Japan Special Meeting on ISSM2003

    • Description
      「研究成果報告書概要(欧文)」より
    • Related Report
      2004 Final Research Report Summary
  • [Publications] 齋藤和之, 有馬澄佳: "A Novel Dispatch Algorithm reducing Adjustment Rate in a Product-mix"Proc.2003 IEEE Intern.Symp.on Semicon.Manufacture.(ISSM). 285-288 (2003)

    • Related Report
      2003 Annual Research Report
  • [Publications] 齋藤和之, 永島 充: "Minimization of Adjustment Frequency to achieve Low-Cost Fabrication"Technical Report, The University of Aizu. 2004-2-001. (2004)

    • Related Report
      2003 Annual Research Report

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Published: 2003-04-01   Modified: 2016-04-21  

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