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Stereo-Vision Image Sensor LSI Fabricated by 3D Heterogeneous Integration Technology

Research Project

Project/Area Number 15H02246
Research Category

Grant-in-Aid for Scientific Research (A)

Allocation TypeSingle-year Grants
Section一般
Research Field Electron device/Electronic equipment
Research InstitutionTohoku University

Principal Investigator

KOYANAGI MITSUMASA  東北大学, 未来科学技術共同研究センター, 名誉教授 (60205531)

Co-Investigator(Kenkyū-buntansha) 木野 久志  東北大学, 学際科学フロンティア研究所, 助教 (10633406)
田中 徹  東北大学, 医工学研究科, 教授 (40417382)
ベ ジチョル  東北大学, 未来科学技術共同研究センター, 助教 (40509874)
清山 浩司  長崎総合科学大学, 工学(系)研究科(研究院), 研究員 (60412722)
橋本 宏之  東北大学, 未来科学技術共同研究センター, 学術研究員 (80589432)
Project Period (FY) 2015-04-01 – 2018-03-31
Project Status Completed (Fiscal Year 2017)
Budget Amount *help
¥44,980,000 (Direct Cost: ¥34,600,000、Indirect Cost: ¥10,380,000)
Fiscal Year 2017: ¥7,670,000 (Direct Cost: ¥5,900,000、Indirect Cost: ¥1,770,000)
Fiscal Year 2016: ¥15,470,000 (Direct Cost: ¥11,900,000、Indirect Cost: ¥3,570,000)
Fiscal Year 2015: ¥21,840,000 (Direct Cost: ¥16,800,000、Indirect Cost: ¥5,040,000)
Keywords電子デバイス・機器 / 先端機能デバイス / 半導体物性 / システムオンチップ / スマートセンサ情報システム
Outline of Final Research Achievements

A new 3D stacked image sensor LSI with multiply stacked photodiode layers has been proposed. In this 3D stacked image sensor LSI, Si photodiode layers act as image sensor and optical filter. Therefore we did not need conventional color filters. It was revealed that a higher quality image can be obtained in this 3D stacked image sensor LSI by increasing the number of Si photodiode layers and carefully designing the anti-reflection layers. A 3D stacked image sensor LSI with Si four-layered optical filter has been fabricated where Si four-layered optical filter was bonded onto a 3D stacked CMOS image sensor. CMOs image sensor chip, analog CDS chip and ADC chip were bonded using non-conductive film in the 3D stacked CMOS image senssor after thinning down to 50um and each layer was electrically connected by TSVs and metal microbumps. We could obtain the color image and infrared image in this 3D stacked image sensor LSI.

Report

(4 results)
  • 2017 Annual Research Report   Final Research Report ( PDF )
  • 2016 Annual Research Report
  • 2015 Annual Research Report
  • Research Products

    (32 results)

All 2018 2017 2016 2015

All Journal Article (8 results) (of which Int'l Joint Research: 7 results,  Peer Reviewed: 7 results,  Open Access: 4 results) Presentation (21 results) (of which Int'l Joint Research: 18 results,  Invited: 10 results) Book (3 results)

  • [Journal Article] マルチウェル構造TSVを用いたTSV側壁界面評価方法の開発2018

    • Author(s)
      菅原 陽平, 木野 久志, 福島 誉史, 田中 徹
    • Journal Title

      電子情報通信学会論文誌 C

      Volume: J101-C Pages: 58-65

    • Related Report
      2017 Annual Research Report
    • Peer Reviewed
  • [Journal Article] 3-D Sidewall Interconnect Formation Climbing Over Self-Assembled KGDs for Large-Area Heterogeneous Integration2017

    • Author(s)
      Takafumi Fukushima, Akihiro Noriki, Jichoel Bea, Mariappan Murugesan, Hisashi Kino, Koji Kiyoyama, Kang-Wook Lee, Tetsu Tanaka, and Mitsumasa Koyanagi
    • Journal Title

      IEEE TRANSACTIONS ON ELECTRON DEVICES

      Volume: 64 Issue: 7 Pages: 2912-2918

    • DOI

      10.1109/ted.2017.2705562

    • Related Report
      2017 Annual Research Report
    • Peer Reviewed / Int'l Joint Research
  • [Journal Article] Self-Assembly and Electrostatic Carrier Technology for Via-Last TSV Formation Using Transfer Stacking-Based Chip-to-Wafer 3-D Integration2017

    • Author(s)
      Hideto Hashiguchi , Takafumi Fukushima , Hiroyuki Hashimoto, Ji-Cheol Bea, Mariappan Murugesan, Hisashi Kino, Tetsu Tanaka, and Mitsumasa Koyanagi
    • Journal Title

      IEEE TRANSACTIONS ON ELECTRON DEVICES

      Volume: 64 Issue: 12 Pages: 5065-5072

    • DOI

      10.1109/ted.2017.2767598

    • Related Report
      2017 Annual Research Report
    • Peer Reviewed / Int'l Joint Research
  • [Journal Article] Self-Assembly Based Multichip-to-Wafer Bonding Technologies for 3D/Hetero Integration2016

    • Author(s)
      T. Fukushima, K.W. Lee, T. Tanaka, and M. Koyanagi
    • Journal Title

      ECS Transactions

      Volume: 75 Issue: 9 Pages: 285-290

    • DOI

      10.1149/07509.0285ecst

    • Related Report
      2016 Annual Research Report
    • Peer Reviewed / Open Access / Int'l Joint Research
  • [Journal Article] Oxide-Oxide Thermocompression Direct Bonding Technologies with Capillary Self-Assembly for Multichip-to-Wafer Heterogeneous 3D System Integration2016

    • Author(s)
      Takafumi Fukushima, Hideto Hashiguchi, Hiroshi Yonekura, Hisashi Kino, Mariappan Murugesan, Ji-Chel Bea, Kang-Wook Lee , Tetsu Tanaka and Mitsumasa Koyanagi
    • Journal Title

      Micromachines

      Volume: 7 Issue: 10 Pages: 184-184

    • DOI

      10.3390/mi7100184

    • Related Report
      2016 Annual Research Report
    • Peer Reviewed / Open Access / Int'l Joint Research
  • [Journal Article] Impact of Chip-Edge Structures on Alignment Accuracies of Self-Assembled Dies for Microelectronic System Integration2015

    • Author(s)
      Yuka Ito, Takafumi Fukushima, Hisashi Kino, Kang-Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi
    • Journal Title

      Journal of Microelectromechanical Systems

      Volume: 25 Issue: 1 Pages: 91-100

    • DOI

      10.1109/jmems.2015.2480787

    • Related Report
      2016 Annual Research Report 2015 Annual Research Report
    • Peer Reviewed / Open Access / Int'l Joint Research
  • [Journal Article] Novel Hybrid Bonding Technology Using Ultra-High Density Cu Nano-Pillar for Exascale 2.5D/3D Integration2015

    • Author(s)
      Kangwook Lee, Jichel Bea, Takafumi Fukushima, Suresh Ramalingam, Xin Wu, Tetsu Tanaka, and Mitsumasa Koyanagi
    • Journal Title

      IEEE Electron Device Letters

      Volume: 37 Issue: 1 Pages: 81-83

    • DOI

      10.1109/led.2015.2502584

    • Related Report
      2016 Annual Research Report 2015 Annual Research Report
    • Peer Reviewed / Open Access / Int'l Joint Research
  • [Journal Article] Recent progress in 3D integration technology2015

    • Author(s)
      Mitsumasa Koyanagi
    • Journal Title

      IEICE Electronics Express

      Volume: 12 Issue: 7 Pages: 20152001-20152001

    • DOI

      10.1587/elex.12.20152001

    • NAID

      130005063774

    • ISSN
      1349-2543
    • Related Report
      2015 Annual Research Report
    • Int'l Joint Research
  • [Presentation] スピン塗布型BCBライナー絶縁膜を用いたTSV形成技術2018

    • Author(s)
      李 晟豪, 菅原 陽平, 伊藤 誠人, 木野 久志, 福島 誉史, 田中 徹
    • Organizer
      エレクトロニクス実装学会春季講演大会
    • Related Report
      2017 Annual Research Report
  • [Presentation] Minimized Hysteresis and Low Parasitic Capacitance TSV with PBO (Polybenzoxazole) Liner to Achieve Ultra-High-Speed Data Transmission2017

    • Author(s)
      Hisashi Kino, Masataka Tashiro, Yohei Sugawara, Seiya Tanikawa, Takafumi Fukushima, and Tetsu Tanaka
    • Organizer
      IEEE International Interconnect Technology Conference (IITC 2017)
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Remarkable Suppression of Local Stress in 3D IC by Manganese Nitride-Based Filler with Large Negative CTE2017

    • Author(s)
      Hisashi Kino, Takafumi Fukushima, Tetsu Tanaka
    • Organizer
      IEEE Electronic Components and Technology Conference (ECTC2017)
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research
  • [Presentation] 3D-IC Technology and Reliability Challenges2017

    • Author(s)
      Tetsu Tanaka
    • Organizer
      International Workshop on Junction Technology(IWJT2017)
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research / Invited
  • [Presentation] Temporary Bonding and De-bonding for Multichip-to-Wafer 3D Integration Process Using Spin-on Glass and Hydrogenated Amorphous Si2017

    • Author(s)
      M. Murugesan, T. Fukushima and M. Koyanagi
    • Organizer
      IEEE Electronic Components and Technology Conference (ECTC2017)
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Heterogeneous 3D/2.5D Integration toward IoT and AI era, Mitsumasa Koyanagi, Tohoku University2017

    • Author(s)
      Mitsumasa Koyanagi
    • Organizer
      Symposium on VLSI Technology (Short Course)
    • Related Report
      2017 Annual Research Report
    • Invited
  • [Presentation] Characterization of Cu-TSVs Fabricated by a New All-Wet Process2017

    • Author(s)
      Miao Xiong,Yangyang Yan, Yingtao Ding,Hisashi Kino, Takafumi Fukushima, Tetsu Tanaka
    • Organizer
      International Conference on Solid State Devices and Materials (SSDM2017)
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Challenges and Benefits of 3D Stacked IC Packages2017

    • Author(s)
      Mitsumasa Koyanagi
    • Organizer
      Cooling Technology Workshop (CTW2017)
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research / Invited
  • [Presentation] Novel 3D/2.5D Heterogeneous Integration Technologies for IoT and AI2017

    • Author(s)
      Mitsumasa Koyanagi
    • Organizer
      International Conference on Advanced Materials (IUMRS-ICA2017)
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research / Invited
  • [Presentation] New 2.5/3D Assembly Based on Micro-scale Assembly2017

    • Author(s)
      Mitsumasa Koyanagi
    • Organizer
      3D Architectures for High Density Integration and Packaging (3D-ASIP2017)
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research / Invited
  • [Presentation] Improving the Integrity of Ti Barrier Layer in Cu-TSVs Through Self-Formed TiSix for Via-Last TSV Technology2016

    • Author(s)
      Murugesan Mariappan, JiChel Bea, Takafumi Fukushima, Makoto Motoyoshi, Tetsu Tanaka and Mitsumasa Koyanagi
    • Organizer
      IEEE International 3D System Integration Conference (3DIC)
    • Place of Presentation
      San Francisco, USA
    • Year and Date
      2016-11-09
    • Related Report
      2016 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Nano-scale Cu direct bonding using ultra-high density Cu nano-pillar (CNP) for high yield exascale 2.5/3D integration applications2016

    • Author(s)
      Kangwook. Lee, Ai Nakamura, Jicheol Bea, Takafumi Fukushima, Suresh Ramalingam, Xin Wu, Tanaka Tanaka, and Mitsumasa Koyanagi
    • Organizer
      IEEE International 3D System Integration Conference (3DIC)
    • Place of Presentation
      San Francisco, USA
    • Year and Date
      2016-11-09
    • Related Report
      2016 Annual Research Report
    • Int'l Joint Research
  • [Presentation] New Multichip-to-Wafer 3D Integration Technology Using Self-Assembly and Cu Nano-Pillar Hybrid Bonding2016

    • Author(s)
      M. Koyanagi, K.W. Lee, T. Fukushima, and T. Tanaka
    • Organizer
      IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT2016)
    • Place of Presentation
      Hangzhou, China
    • Year and Date
      2016-10-25
    • Related Report
      2016 Annual Research Report
    • Int'l Joint Research / Invited
  • [Presentation] Transfer and Non-Transfer 3D Stacking Technologies Based on Multichip-to-Wafer Self-Assembly and Direct Bonding2016

    • Author(s)
      T. Fukushima, H. Hashiguchi, H. Kino, M. Murugesan, J. Bea, H. Hashimoto, K. Lee, T. Tanaka and M. Koyanagi
    • Organizer
      IEEE 66th Electronic Components and Technology Conference (ECTC)
    • Place of Presentation
      Las Vegas, USA
    • Year and Date
      2016-05-31
    • Related Report
      2016 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Novel W2W/C2W hybrid bonding technology with high stacking yield using ultra- fine size, ultra-high density Cu nano-pillar (CNP) for exascale 2.5D/3D integration2016

    • Author(s)
      K.W. Lee, C.Nagai, J.C. Bea, T. Fukushima, R. Suresh, and X. Wu, T. Tanaka, and M. Koyanagi
    • Organizer
      IEEE 66th Electronic Components and Technology Conference (ECTC)
    • Place of Presentation
      Las Vegas, USA
    • Year and Date
      2016-05-31
    • Related Report
      2016 Annual Research Report
    • Int'l Joint Research
  • [Presentation] 3D Hetero-integration Technology for Innovative Convergence Systems2015

    • Author(s)
      Kangwook Lee, Takafumi Fukushima, Tetsu Tanaka and Mitsumasa Koyanagi
    • Organizer
      IEEE EDAPS (Electrical Design of Advanced Packaging & Systems) Symposium 2015
    • Place of Presentation
      Seoul, Korea
    • Year and Date
      2015-12-14
    • Related Report
      2015 Annual Research Report
    • Int'l Joint Research / Invited
  • [Presentation] Novel reconfigured wafer-to-wafer (W2W) hybrid bonding technology using ultra-high density nano-Cu filaments for exascale 2.5D/3D integration2015

    • Author(s)
      K-W. Lee, J-C Bea, T. Fukushima, S. Ramalingam, X. Wu, T. Tanaka, M. Koyanagi
    • Organizer
      IEEE International Electron Devices Meeting (IEDM)
    • Place of Presentation
      Washington D.C., USA
    • Year and Date
      2015-12-07
    • Related Report
      2015 Annual Research Report
    • Int'l Joint Research
  • [Presentation] 3次元リコンフィギャラブルLSIによる並列情報処理技術2015

    • Author(s)
      小柳光正
    • Organizer
      電子情報通信学会ソサイエティ大会
    • Place of Presentation
      東北大学(宮城県・仙台市)
    • Year and Date
      2015-09-10
    • Related Report
      2015 Annual Research Report
    • Invited
  • [Presentation] Plasma Activated Chip-to-Wafer Direct Bonding Technology for Self-Assembly Based 3D Integration2015

    • Author(s)
      Hideto Hashiguchi, Takafumi Fukushima, Mariappan Murugesan, Hisashi Kino, Kang-Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi
    • Organizer
      IEEE Electronic Components and Technology Conference (ECTC)
    • Place of Presentation
      San Diego, USA
    • Year and Date
      2015-05-26
    • Related Report
      2015 Annual Research Report
    • Int'l Joint Research
  • [Presentation] 3D-LSI System Module for Future Automatic Driving Vehicle Fabricated by Heterogeneous 3D Integration Technology2015

    • Author(s)
      M. Koyanagi
    • Organizer
      CMOS Emerging Technology Symp. (CMOSETR 2015)
    • Place of Presentation
      Vancouver, Canada
    • Year and Date
      2015-05-21
    • Related Report
      2015 Annual Research Report
    • Int'l Joint Research / Invited
  • [Presentation] 3D LSI and Nanotehnology for IOT2015

    • Author(s)
      M. Koyanagi
    • Organizer
      International Nanotechnology Conference on Communication and Cooperation (INC11)
    • Place of Presentation
      ヒルトン福岡 (福岡県・福岡市)
    • Year and Date
      2015-05-11
    • Related Report
      2015 Annual Research Report
    • Int'l Joint Research / Invited
  • [Book] 新材料・新素材シリーズ 熱膨張制御材料の開発と応用2018

    • Author(s)
      木野久志, 田中徹
    • Total Pages
      205
    • Publisher
      シーエムシー出版
    • ISBN
      9784781313160
    • Related Report
      2017 Annual Research Report
  • [Book] 3D Integration in VLSI Circuits: Implementation Technologies and Applications2018

    • Author(s)
      M. Koyanagi, T. Fukushima, and T. Tanaka
    • Total Pages
      217
    • Publisher
      CRC Press
    • ISBN
      9781138710399
    • Related Report
      2017 Annual Research Report
  • [Book] Three Dimensional Integration of Semiconductors Processing Materials and Applications2015

    • Author(s)
      Kang-Wook Lee, M. Koyanagi
    • Total Pages
      408
    • Publisher
      Springer
    • Related Report
      2015 Annual Research Report

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Published: 2015-04-16   Modified: 2019-03-29  

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