High-speed data transmission technology system based on coding and signal processing and its application
| Project/Area Number |
15H02675
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Computer system
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| Research Institution | Gunma University |
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Principal Investigator |
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| Project Period (FY) |
2015-04-01 – 2019-03-31
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| Project Status |
Completed (Fiscal Year 2018)
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| Budget Amount *help |
¥13,520,000 (Direct Cost: ¥10,400,000、Indirect Cost: ¥3,120,000)
Fiscal Year 2017: ¥3,770,000 (Direct Cost: ¥2,900,000、Indirect Cost: ¥870,000)
Fiscal Year 2016: ¥3,250,000 (Direct Cost: ¥2,500,000、Indirect Cost: ¥750,000)
Fiscal Year 2015: ¥6,500,000 (Direct Cost: ¥5,000,000、Indirect Cost: ¥1,500,000)
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| Keywords | 多値論理 / 高速信号伝送 / 波形等化回路 / PAM-4 / イコライザ / 符号化技術 / FPGA / 高速インタフェース / 情報通信工学 / 等化回路 / 多値情報処理 / 高速伝送回路設計 / 波形等化技術 |
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| Outline of Final Research Achievements |
There is growing demand for ultra-high-speed serial electric interconnects for data centers and throughout the IT infrastructure. However, in such high-speed serial links, channel distortion which arises from the limited channel bandwidth, and noise significantly restricts the total VLSI system performance.
This research proposes network-centric VLSI system design based on sophisticated coding and signal processing techniques to overcome the problems. In particular, we consider the high-speed data transmission techniques based on PAM-4 signaling that is adopted in the next-generation high-speed signal transmission standard. The main research results are (1) consideration and demonstration of waveform equalization algorithm for PAM-4 data transmission and (2) evaluation of signal integrity by statistical eye pattern measurement of PAM-4 signaling.
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| Academic Significance and Societal Importance of the Research Achievements |
近年、集積回路システムやデータセンター等において高速大容量データ伝送のニーズが高まっているが、配線の激増・伝送波形の劣化等が高速信号伝送の技術的課題となっている。本研究は、携帯電話等の無線通信で用いられている高度な符号化・信号処理技術が信号伝送の高性能化に適用可能な点に着目し、配線主体のVLSIシステムの設計理論体系を構築する点に学術的意義を有する。
本研究成果は、微細化された集積回路において、従来のデバイス主体の設計とは異なり、配線の高性能化に着目することによりデバイス性能を活かす新視点からの集積回路設計手法であり、ビックデータ、IoT時代のICTインフラ実現に有効な技術と考えられる。
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Report
(4 results)
Research Products
(21 results)
